Efficient Crosstalk Reduction Technique for Data Bus

has become the great challenge to the design community in Deep-submicron (DSM) and Very Deep- submicron (VDSM) technologies. As the portion of silicon area for interconnects and buses is dominating, crosstalk effect also dominates in deciding the reliability and performance of the SoCs and many types of processors. These interconnect and buses are prone to errors due to crosstalk. The major part of the crosstalk is due to coupling transitions occurring on the data bus and interconnects when signals are transmitted. One of the favorable techniques to reduce the crosstalk is to reduce the coupling transitions. Bus encoding technique is the promising method to reduce the crosstalk. Hence an efficient Crosstalk reduction data bus encoding scheme is proposed which can reduce the 6C, 5C and 4C crosstalk for 64-bit data bus around 88%, 68% and 24% respectively, for 32-bit data bus around 89%, 74% and 32% respectively and 16-bit data bus by 93%, 71% and 19% respectively. KeywordsData bus, Reliability, Efficient.

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