Automatic mixed-mode timing simulation

A novel technique is introduced for automatically performing mixed-mode timing simulation of MOS circuits. A SPICE2 circuit description is assumed to be given, the circuit is first partitioned into channel-connected subcircuits. Each subcircuit is then examined and is statically classified as digital or analog if one of many configurations is detected. Subcircuits which contain memory cells, sense amplifiers, or internal feedback are automatically classified as analog. Any user-specified analog subcircuits are classified as analog. Analog subcircuits are simulated using detailed electrical simulation while digital subcircuits are simulated using fast timing simulation with a ramp waveform representation. Fast timing simulation uses a nonlinear macromodel to model the charging and discharging of subcircuit output nodes. State transitions are initially modeled using a single ramp. Static and dynamic mode selection are used to ensure that accuracy is retained during simulation while minimizing simulation time. The implementation of these techniques in IDSIM2 is discussed. Examples of automatic mixed-mode timing simulation are presented.<<ETX>>