A 975-to-1960MHz fast-locking fractional-N synthesizer with adaptive bandwidth control and 4/4.5 prescaler for digital TV tuners

There is a high demand for high-performance tuners to meet the digital video broadcasting-terrestrial (DVB-T) standard. Often the DVB-T tuners employ a double-conversion zero-IF (DZIF) architecture that demands a wideband fractional-N synthesizer as the first local oscillator (LO1) to cover the frequency range of 975 to 1960MHz. This LO1 needs to meet a stringent phase-noise requirement with an adequate target phase noise of −87dBc/Hz at a 10kHz offset and integrated rms phase error less than 1° [1]. Because of the very wide frequency range, the variation of loop bandwidth may affect the phase-noise performance and loop stability.

[1]  D. Saias,et al.  A 0.12 /spl mu/m CMOS DVB-T tuner , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[2]  Hao Min,et al.  A fully integrated 1.175-to-2GHz frequency synthesizer with constant bandwidth for DVB-T applications , 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

[3]  Yu-Che Yang,et al.  A Quantization Noise Suppression Technique for$DeltaSigma$Fractional-$N$Frequency Synthesizers , 2006, IEEE Journal of Solid-State Circuits.

[4]  Y. Watanabe,et al.  An 18mW 90 to 770MHz synthesizer with agile auto-tuning for digital TV-tuners , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[5]  Eric Andre,et al.  23.3 A 0.12∝m CMOS DVB-T Tuner , 2005 .