A 5GHz fully integrated super-regenerative receiver with on-chip slot antenna in 0.13μm CMOS

A single chip receiver based on super-regeneration incorporates an on-chip slot antenna and digital received data synchronization. A capacitively-loaded standing-wave resonator improves energy efficiency. An all-digital PLL timing scheme synchronizes the received data clock. The prototype 5 GHz receiver, implemented in 0.13 mum CMOS, achieves a data rate of up to 1.2 Mb/s, dissipates 6.6 mW from a 1.5 V supply, and occupies a die area of 2.4 mm2.

[1]  N. Behdad,et al.  A 0.3mm/sup 2/ Miniaturized X-Band On-Chip Slot Antenna in 0.13/spl mu/m CMOS , 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

[2]  M. Declercq,et al.  A low-power CMOS super-regenerative receiver at 1 GHz , 2001, IEEE J. Solid State Circuits.

[3]  B. Otis,et al.  21.4 A 400∝W-RX, 1.6mW-TX Super- Regenerative Transceiver for Wireless Sensor Networks , 2005 .

[4]  Behzad Razavi.  Clock Recovery from Random Binary Signals , 1996 .

[5]  M.P. Flynn,et al.  A Fully Integrated Auto-Calibrated SuperRegenerative Receiver , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[6]  J. Rabaey,et al.  A 400 /spl mu/W-RX, 1.6mW-TX super-regenerative transceiver for wireless sensor networks , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[7]  M.P. Flynn,et al.  A Fully Integrated Auto-Calibrated Super-Regenerative Receiver in 0.13-$\mu{\hbox {m}}$ CMOS , 2007, IEEE Journal of Solid-State Circuits.

[8]  M. Flynn,et al.  A Compact 5GHz Standing-Wave Resonator-based VCO in 0.13/spl mu/m CMOS , 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

[9]  J. Fellrath,et al.  CMOS analog integrated circuits based on weak inversion operations , 1977 .