Embodiments of the invention relate generally to an integrated circuit with a Speicherzellenanordung and a method for reading a memory cell state using a plurality of sub-read operations. In one embodiment of the invention, an integrated circuit is provided with a memory cell array. The memory cell array may comprise at least one memory cell, said memory cell is adapted to store a plurality of memory cell states, which are distinguished from one another by means of a predefined number of memory cell threshold values, and a controller that is adapted for reading a memory cell state of the at least one memory cell using a number of reference levels, which is greater than the predefined number of memory cell threshold values, wherein the reading comprises a first sub-read operation using a first set of a plurality of reference levels, and a second sub-read operation using a second set a plurality of reference levels, wherein the second set comprises a plurality of reference levels at least one reference level is welchedr different from the reference levels of the first set of a plurality of reference levels.