PERFORMANCE EVALUATION OF INVERTED SINE PWM TECHNIQUE FOR AN ASYMMETRIC CASCADED MULTILEVEL INVERTER

Multilevel inverter (MLI) is a new breed of power converter that is suited for high power applications. The various topologies of MLI are diode –clamped, capacitor clamped and cascaded H-bridge inverter[1].This paper focuses on cascaded MLI using two unequal dc sources in order to produce a seven-level output. The proposed topology reduces the number of dc sources and switching elements. Various modulation methods have been reported for the MLI in the literature [2], but this paper emphasis on unipolar inverted sine PWM (ISPWM) technique. The unipolar Inverted Sine Carrier Pulse-Width Modulation (ISCPWM) technique reduces the number of carriers and enhances the fundamental output voltage particularly at lower modulation index ranges with reduction in Total Harmonic Distortion (THD), and switching losses. The performance evaluation of the proposed PWM strategy for three-phase multilevel inverter is done using MATLAB and the optimum switching frequency with minimized total harmonic distortion and switching loss is determined. The gating signals are generated using Spartan FPGA processor as it provides better resolution. The simulation results are verified experimentally.

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