A Novel Virtual Space Vector Modulation With Reduced Common-Mode Voltage and Eliminated Neutral Point Voltage Oscillation for Neutral Point Clamped Three-Level Inverter

This paper briefly reviews the common-mode voltage (CMV) and neutral point (NP) voltage for neutral point clamped three-level inverter (NPC TLI). Then, the space vector pulsewidth modulation (SVPWM) and traditional virtual SVPWM (VSVPWM) are discussed in terms of these two issues, revealing the drawbacks in reducing CMV or eliminating NP voltage oscillation. A novel virtual space vector modulation, named as RCMV_VSVPWM, is proposed in this paper to reduce CMV and eliminate NP voltage oscillation for NPC TLI. By selecting vectors with lower CMVs, a set of novel virtual voltage vectors are generated. The highlight of the method is zero average NP current in one control cycle and lower CMV. Furthermore, the active NP voltage control suitable for RCMV_VSVPWM is presented and evaluated. The corresponding experimental results are given, which are well-consistent with theoretical analysis.

[1]  Pragasen Pillay,et al.  Modified DC-Bus Voltage Balancing Algorithm for a Three-Level Neutral-Point-Clamped PMSM Inverter Drive With Reduced Common-Mode Voltage , 2016, IEEE Transactions on Industry Applications.

[2]  Johann W. Kolar,et al.  Comparative Evaluation of Advanced Three-Phase Three-Level Inverter/Converter Topologies Against Two-Level Systems , 2013, IEEE Transactions on Industrial Electronics.

[3]  Yun Wei Li,et al.  A Space-Vector Modulation Method for Common-Mode Voltage Reduction in Current-Source Converters , 2014, IEEE Transactions on Power Electronics.

[4]  Vivek Agarwal,et al.  A Modified T-Structured Three-Level Inverter Configuration Optimized With Respect to PWM Strategy Used for Common-Mode Voltage Elimination , 2017, IEEE Transactions on Industry Applications.

[5]  D. Boroyevich,et al.  The nearest three virtual space vector PWM - a modulation for the comprehensive neutral-point balancing in the three-level NPC inverter , 2004, IEEE Power Electronics Letters.

[6]  D. G. Holmes,et al.  Reduced PWM harmonic distortion for multilevel inverters operating over a wide modulation range , 2006, IEEE Transactions on Power Electronics.

[7]  Santiago A. Verne,et al.  Multilevel Converters for Industrial Applications , 2013 .

[8]  Seung-Ki Sul,et al.  Common-mode voltage reduction of three level four leg PWM converter , 2014, 2014 IEEE Energy Conversion Congress and Exposition (ECCE).

[9]  Nho-Van Nguyen,et al.  Eliminated Common-Mode Voltage Pulsewidth Modulation to Reduce Output Current Ripple for Multilevel Inverters , 2016, IEEE Transactions on Power Electronics.

[10]  S. Busquets-Monge,et al.  Pulsewidth Modulations for the Comprehensive Capacitor Voltage Balance of $n$-Level Three-Leg Diode-Clamped Converters , 2009, IEEE Transactions on Power Electronics.

[11]  Yingjie He,et al.  A Comprehensive Study on Equivalent Modulation Waveforms of the SVM Sequence for Three-Level Inverters , 2015, IEEE Transactions on Power Electronics.

[12]  Hiralal M. Suryawanshi,et al.  Three-Dimensional Space-Vector Modulation to Reduce Common-Mode Voltage for Multilevel Inverter , 2010, IEEE Transactions on Industrial Electronics.

[13]  Nho-Van Nguyen,et al.  Novel Eliminated Common-Mode Voltage PWM Sequences and an Online Algorithm to Reduce Current Ripple for a Three-Level Inverter , 2017, IEEE Transactions on Power Electronics.

[14]  Seung-Ki Sul,et al.  Common-Mode Voltage Reduction of Three-Level Four-Leg PWM Converter , 2014, IEEE Transactions on Industry Applications.

[15]  Bin Wu,et al.  Recent Advances and Industrial Applications of Multilevel Converters , 2010, IEEE Transactions on Industrial Electronics.

[16]  S. Busquets-Monge,et al.  A Virtual-Vector Pulsewidth Modulation for theFour-Level Diode-Clamped DC–AC Converter , 2008, IEEE Transactions on Power Electronics.

[17]  Subhashish Bhattacharya,et al.  Harmonic Analysis and Controller Design of 15 kV SiC IGBT-Based Medium-Voltage Grid-Connected Three-Phase Three-Level NPC Converter , 2017, IEEE Transactions on Power Electronics.

[18]  Pragasen Pillay,et al.  Comparative Analysis Between Two-Level and Three-Level DC/AC Electric Vehicle Traction Inverters Using a Novel DC-Link Voltage Balancing Algorithm , 2014, IEEE Journal of Emerging and Selected Topics in Power Electronics.

[19]  A. Muetze,et al.  Simplified Design of Common-Mode Chokes for Reduction of Motor Ground Currents in Inverter Drives , 2006, IEEE Transactions on Industry Applications.

[20]  Wang Dafang,et al.  Neutral-Point Voltage Balancing in Three-Level Inverters Using an Optimized Virtual Space Vector PWM With Reduced Commutations , 2018, IEEE Transactions on Industrial Electronics.

[21]  Stig Munk-Nielsen,et al.  Overmodulation of n-Level Three-Leg DC - AC Diode-Clamped Converters With Comprehensive Capacitor Voltage Balance , 2013, IEEE Transactions on Industrial Electronics.

[22]  Changliang Xia,et al.  Adjustable Proportional Hybrid SVPWM Strategy for Neutral-Point-Clamped Three-Level Inverters , 2013, IEEE Transactions on Industrial Electronics.

[23]  Hong-Hee Lee,et al.  A reduced switching loss PWM strategy to eliminate common mode voltage in multilevel inverters , 2014, 2014 IEEE Energy Conversion Congress and Exposition (ECCE).

[24]  S. Bernet,et al.  A comparison of three-level converters versus two-level converters for low-voltage drives, traction, and utility applications , 2005, IEEE Transactions on Industry Applications.

[25]  Nho-Van Nguyen,et al.  An Efficient Four-State Zero Common-Mode Voltage PWM Scheme With Reduced Current Distortion for a Three-Level Inverter , 2018, IEEE Transactions on Industrial Electronics.

[26]  H. Akagi,et al.  Design and performance of a passive EMI filter for use with a voltage-source PWM inverter having sinusoidal output voltage and zero common-mode voltage , 2004, IEEE Transactions on Power Electronics.

[27]  Li Kai,et al.  Performance analysis of zero common-mode voltage pulse-width modulation techniques for three-level neutral point clamped inverters , 2016 .