Germanium-on-insulator (GeOI) substrates—A novel engineered substrate for future high performance devices

Abstract Germanium-on-insulator (GeOI), which combines high mobility of charge carriers with the advantages of an SOI structure, is an attractive integration platform for the future IC technology. Also, due to its low lattice mismatch with GaAs, III–V compounds transistors as well as optoelectronic functions can be integrated on GeOI. In this paper, we review GeOI fabrication methods, and then applications that utilize GeOI wafers. The Smart Cut™ layer transfer technology is found to be the best method to form wafer-level GeOI structures of different diameters and thickness range down to

[1]  M.A. Smith,et al.  Investigations of high-performance GaAs solar cells grown on Ge-Si/sub 1-x/Ge/sub x/-Si substrates , 2005, IEEE Transactions on Electron Devices.

[2]  Dimitri A. Antoniadis,et al.  Hole mobility enhancements in strained Si/Si1-yGey p-type metal-oxide-semiconductor field-effect transistors grown on relaxed Si1-xGex (x , 2001 .

[3]  D. A. Ahmari,et al.  Fabrication and characterization of InGaP/GaAs heterojunction bipolar transistors on GOI substrates , 2005, IEEE Electron Device Letters.

[4]  James D. Plummer,et al.  High-quality single-crystal Ge on insulator by liquid-phase epitaxy on Si substrates , 2004 .

[5]  Marc Heyns,et al.  Optimisation of a thin epitaxial Si layer as Ge passivation layer to demonstrate deep sub-micron n- and p-FETs on Ge-On-Insulator substrates , 2005 .

[6]  S. M. Sze,et al.  Physics of semiconductor devices , 1969 .

[7]  Gerard Ghibaudo,et al.  New method for the extraction of MOSFET parameters , 1988 .

[8]  T. Signamarcheix,et al.  Fabrication and characterisation of 200 mm germanium-on-insulator (GeOI) substrates made from bulk germanium , 2006 .

[9]  Shinichi Takagi,et al.  Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique , 2003 .

[10]  D. Kwong,et al.  Ge n-MOSFETs on lightly doped substrates with high-/spl kappa/ dielectric and TaN gate , 2006, IEEE Electron Device Letters.

[11]  C. L. Dohrman,et al.  Growth of GaAs on vicinal Ge surface using low-temperature migration-enhanced epitaxy , 2006 .

[12]  Sorin Cristoloveanu,et al.  A review of the pseudo-MOS transistor in SOI wafers: operation, parameter extraction, and applications , 2000 .

[13]  Laurent Vivien,et al.  Reduced pressure–chemical vapor deposition of Ge thick layers on Si(001) for 1.3–1.55-μm photodetection , 2004 .

[14]  H.-S.P. Wong,et al.  Self-aligned n-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric and tungsten gate , 2004, IEEE Electron Device Letters.

[15]  T. Tezuka,et al.  High mobility Ge-on-insulator p-channel MOSFETs using Pt germanide Schottky source/drain , 2005, IEEE Electron Device Letters.

[16]  E. Fitzgerald.  Engineered substrates and their future role in microelectronics , 2005 .