暂无分享,去创建一个
[1] Y. Hori,et al. SASEBO-GIII: A hardware security evaluation board equipped with a 28-nm FPGA , 2012, The 1st IEEE Global Conference on Consumer Electronics 2012.
[2] François-Xavier Standaert,et al. Towards Globally Optimized Masking: From Low Randomness to Low Noise Rate or Probe Isolating Multiplications with Reduced Randomness and Security against Horizontal Attacks , 2019, IACR Trans. Cryptogr. Hardw. Embed. Syst..
[3] Yoshua Bengio,et al. BinaryNet: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1 , 2016, ArXiv.
[4] Hiroki Nakahara,et al. On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA , 2017, 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).
[5] Christophe Clavier,et al. Correlation Power Analysis with a Leakage Model , 2004, CHES.
[6] Zhiru Zhang,et al. Reverse Engineering Convolutional Neural Networks Through Side-channel Information Leaks , 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).
[7] Christopher Meek,et al. Adversarial learning , 2005, KDD '05.
[8] Bo Luo,et al. I Know What You See: Power Side-Channel Attack on Convolutional Neural Network Accelerators , 2018, ACSAC.
[9] Nael B. Abu-Ghazaleh,et al. Rendered Insecure: GPU Side Channel Attacks are Practical , 2018, CCS.
[10] Jean-Baptiste Note,et al. From the bitstream to the netlist , 2008, FPGA '08.
[11] Ananthram Swami,et al. Practical Black-Box Attacks against Machine Learning , 2016, AsiaCCS.
[12] Fan Zhang,et al. Stealing Machine Learning Models via Prediction APIs , 2016, USENIX Security Symposium.
[13] Tim Güneysu,et al. Arithmetic Addition over Boolean Masking - Towards First- and Second-Order Resistance in Hardware , 2015, ACNS.
[14] Binghui Wang,et al. Stealing Hyperparameters in Machine Learning , 2018, 2018 IEEE Symposium on Security and Privacy (SP).
[15] Igor Carron,et al. XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks , 2016 .
[16] Thomas S. Messerges,et al. Using Second-Order Power Analysis to Attack DPA Resistant Software , 2000, CHES.
[17] W. Kinzel,et al. Secure exchange of information by synchronization of neural networks , 2002 .
[18] Eriko Nurvitadhi,et al. Accelerating Binarized Neural Networks: Comparison of FPGA, CPU, GPU, and ASIC , 2016, 2016 International Conference on Field-Programmable Technology (FPT).
[19] Michael K. Reiter,et al. Cross-VM side channels and their use to extract private keys , 2012, CCS.
[20] Mehdi Baradaran Tahoori,et al. An inside job: Remote power analysis attacks on FPGAs , 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[21] Paul C. Kocher,et al. Differential Power Analysis , 1999, CRYPTO.
[22] Pankaj Rohatgi,et al. Introduction to differential power analysis , 2011, Journal of Cryptographic Engineering.
[23] Lejla Batina,et al. CSI NN: Reverse Engineering of Neural Network Architectures Through Electromagnetic Side Channel , 2019, USENIX Security Symposium.
[24] Christof Paar,et al. Building a Side Channel Based Disassembler , 2010, Trans. Comput. Sci..
[25] Samuel Marchal,et al. PRADA: Protecting Against DNN Model Stealing Attacks , 2018, 2019 IEEE European Symposium on Security and Privacy (EuroS&P).
[26] Louis Goubin,et al. A Generic Protection against High-Order Differential Power Analysis , 2003, FSE.
[27] Frederik Vercauteren,et al. A masked ring-LWE implementation , 2015, IACR Cryptol. ePrint Arch..
[28] Josep Torrellas,et al. Cache Telepathy: Leveraging Shared Resource Attacks to Learn DNN Architectures , 2018, USENIX Security Symposium.
[29] Shweta Shinde,et al. Privado: Practical and Secure DNN Inference , 2018, ArXiv.
[30] Ananthram Swami,et al. The Limitations of Deep Learning in Adversarial Settings , 2015, 2016 IEEE European Symposium on Security and Privacy (EuroS&P).
[31] Frederik Vercauteren,et al. Additively Homomorphic Ring-LWE Masking , 2016, PQCrypto.
[32] Vincent Rijmen,et al. Threshold Implementations Against Side-Channel Attacks and Glitches , 2006, ICICS.
[33] Pedro M. Domingos,et al. Adversarial classification , 2004, KDD.
[34] Vitaly Shmatikov,et al. Membership Inference Attacks Against Machine Learning Models , 2016, 2017 IEEE Symposium on Security and Privacy (SP).
[35] Takeshi Sugawara. 3-Share Threshold Implementation of AES S-box without Fresh Randomness , 2019, IACR Trans. Cryptogr. Hardw. Embed. Syst..
[36] Vincent Rijmen,et al. M&M: Masks and Macs against Physical Attacks , 2018, IACR Trans. Cryptogr. Hardw. Embed. Syst..
[37] Ingrid Verbauwhede,et al. DPA, Bitslicing and Masking at 1 GHz , 2015, IACR Cryptol. ePrint Arch..
[38] Ingrid Verbauwhede,et al. A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[39] Gang Wang,et al. Man vs. Machine: Practical Adversarial Detection of Malicious Crowdsourcing Workers , 2014, USENIX Security Symposium.
[40] G. Edward Suh,et al. FPGA-Based Remote Power Side-Channel Attacks , 2018, 2018 IEEE Symposium on Security and Privacy (SP).
[41] Daniel E. Holcomb,et al. FPGA Side Channel Attacks without Physical Access , 2018, 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).
[42] Philip Heng Wai Leong,et al. FINN: A Framework for Fast, Scalable Binarized Neural Network Inference , 2016, FPGA.
[43] Jean-Sébastien Coron,et al. On Boolean and Arithmetic Masking against Differential Power Analysis , 2000, CHES.
[44] Lejla Batina,et al. CSI Neural Network: Using Side-channels to Recover Your Artificial Neural Network Information , 2018, IACR Cryptol. ePrint Arch..
[45] Sorin A. Huss,et al. Bil: A tool-chain for bitstream reverse-engineering , 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).