论文信息 - Coarse Image Region Segmentation Using Resistive-fuse Networks Implemented in FPGA

Coarse Image Region Segmentation Using Resistive-fuse Networks Implemented in FPGA

Two digital LSI implementation methods for nonlinear resistive networks are proposed; one is for pixel-parallel operation and the other is for pixel-serial operation. we have designed digital circuits that emulate the operation of analog nonlinear resistive networks by discrete-time dynamics based on clock operation. The steady state of the networks is obtained by repeating the updating sequence. The resistive-fuse network has been implemented in an FPGA. Coarse region segmentation of real images with 64 64 pixels at the video rate is successfully demonstrated by using an FPGA.

T. Morie | H. Ando | A. Iwata | T. Nakano | Hideaki Ishizu

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