An Adaptive WTA using Floating Gate Technology

We have designed, fabricated, and tested an adaptive Winner-Take-All (WTA) circuit based upon the classic WTA of Lazzaro, et al [1]. We have added a time dimension (adaptation) to this circuit to make the input derivative an important factor in winner selection. To accomplish this, we have modified the classic WTA circuit by adding floating gate transistors which slowly null their inputs over time. We present a simplified analysis and experimental data of this adaptive WTA fabricated in a standard CMOS 2µm process.

[1]  Paul E. Hasler,et al.  Single transistor learning synapse with long term storage , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[2]  Paul E. Hasler,et al.  Single Transistor Learning Synapses , 1994, NIPS.

[3]  M. Lenzlinger,et al.  Fowler‐Nordheim Tunneling into Thermally Grown SiO2 , 1969 .

[4]  Paul Hasler,et al.  An autozeroing amplifier using PFET hot-electron injection , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[5]  John Lazzaro,et al.  Winner-Take-All Networks of O(N) Complexity , 1988, NIPS.

[6]  M. Lenzlinger,et al.  Fowler-Nordheim tunneling into thermally grown SiO 2 , 1968 .