Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip

In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers as result of cache misses. This has a huge impact on worst-case execution time (WCET) analysis and, in general, on the predictability of real-time applications implemented on such systems. As opposed to the WCET analysis performed for a single processor system, where the cache miss penalty is considered constant, in a multiprocessor system each cache miss has a variable penalty, depending on the bus contention. This affects the tasks' WCET which, however, is needed in order to perform system scheduling. At the same time, the WCET depends on the system schedule due to the bus interference. In this paper we present an approach to worst-case execution time analysis and system scheduling for real-time applications implemented on multiprocessor SoC architectures. The emphasis of this paper is on the bus scheduling policy and its optimization, which is of huge importance for the performance of such a predictable multiprocessor application.

[1]  Lothar Thiele,et al.  Design for Timing Predictability , 2004, Real-Time Systems.

[2]  Luca Benini,et al.  A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[3]  Nikil D. Dutt,et al.  Fast exploration of bus-based on-chip communication architectures , 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

[4]  Gang Zhou,et al.  VigilNet: An integrated sensor network system for energy-efficient surveillance , 2006, TOSN.

[5]  Rolf Ernst,et al.  Associative caches in formal software timing analysis , 2002, DAC '02.

[6]  Kees Goossens,et al.  AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.

[7]  Hongwei Zhang,et al.  Reliable bursty convergecast in wireless sensor networks , 2005, MobiHoc '05.

[8]  Sharad Malik,et al.  Cache modeling for real-time software: beyond direct mapped instruction caches , 1996, 17th IEEE Real-Time Systems Symposium.

[9]  Petru Eles,et al.  Analysis and optimization of distributed real-time embedded systems , 2004, ACM Trans. Design Autom. Electr. Syst..

[10]  Bruce E. Hajek,et al.  Link scheduling in polynomial time , 1988, IEEE Trans. Inf. Theory.

[11]  Milind Dawande,et al.  Link scheduling in sensor networks: distributed edge coloring revisited , 2005, Proceedings IEEE 24th Annual Joint Conference of the IEEE Computer and Communications Societies..

[12]  B. Hohlt,et al.  Flexible power scheduling for sensor networks , 2004, Third International Symposium on Information Processing in Sensor Networks, 2004. IPSN 2004.

[13]  T. Hamalainen,et al.  Overview of bus-based system-on-chip interconnections , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[14]  Reinhard Wilhelm,et al.  The influence of processor architecture on the design and the results of WCET tools , 2003, Proceedings of the IEEE.

[15]  Francesco Poletti,et al.  Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[16]  Eric A. Brewer,et al.  Network Power Scheduling for TinyOS Applications , 2006, DCOSS.

[17]  Hermann Kopetz,et al.  Real-time systems , 2018, CSC '73.

[18]  Wayne H. Wolf,et al.  Computers as components - principles of embedded computing system design , 2005 .

[19]  Rolf Ernst,et al.  Scheduling analysis of real-time systems with precise modeling of cache related preemption delay , 2005, 17th Euromicro Conference on Real-Time Systems (ECRTS'05).

[20]  S. Ramanathan.  A unified framework and algorithm for channel assignment in wireless networks , 1999, Wirel. Networks.

[21]  Rajgopal Kannan,et al.  Approximation Algorithms for Power-Aware Scheduling of Wireless Sensor Networks with Rate and Duty-Cycle Constraints , 2006, DCOSS.

[22]  Ying Zhang,et al.  Distributed Minimal Time Convergecast Scheduling in Wireless Sensor Networks , 2006, 26th IEEE International Conference on Distributed Computing Systems (ICDCS'06).

[23]  Alan Burns,et al.  Guest Editorial: A Review of Worst-Case Execution-Time Analysis , 2000, Real-Time Systems.

[24]  Massimo Franceschetti,et al.  Lower bounds on data collection time in sensory networks , 2004, IEEE Journal on Selected Areas in Communications.

[25]  Milind Dawande,et al.  Energy efficient schemes for wireless sensor networks with multiple mobile base stations , 2003, GLOBECOM '03. IEEE Global Telecommunications Conference (IEEE Cat. No.03CH37489).

[26]  Frank Mueller,et al.  Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks , 2006, 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'06).

[27]  Henrik Theiling,et al.  Fast and Precise WCET Prediction by Separated Cache and Path Analyses , 2000, Real-Time Systems.

[28]  Rolf Ernst,et al.  Integrated analysis of communicating tasks in MPSoCs , 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).

[29]  Robert J. McEliece,et al.  Packets distribution algorithms for sensor networks , 2003, IEEE INFOCOM 2003. Twenty-second Annual Joint Conference of the IEEE Computer and Communications Societies (IEEE Cat. No.03CH37428).

[30]  Lui Sha,et al.  Real-time communication and coordination in embedded sensor networks , 2003, Proc. IEEE.

[31]  Ronald L. Graham,et al.  Optimal scheduling for two-processor systems , 1972, Acta Informatica.

[32]  Rolf Ernst,et al.  Worst case timing analysis of input dependent data cache behavior , 2006, 18th Euromicro Conference on Real-Time Systems (ECRTS'06).

[33]  Petru Eles,et al.  Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip , 2007, 28th IEEE International Real-Time Systems Symposium (RTSS 2007).