Ultra-low inductance vertical phase leg design with EMI noise propagation control for enhancement mode GaN transistors

This paper presents an improved phase leg power loop design for enhance mode lateral structure Gallium Nitride (GaN) transistors. Static characterization results of a 650V/30A GaN transistor are presented to determine the design parameters of the gate driver circuits. The control of Common Mode (CM) noise current propagation is considered during the gate driver design by optimizing the power distribution and grounding structure of the gate driver and digital control circuits. By differentiating the propagation path impedance of digital control circuits and their power supply circuits, conductive CM noise can propagate through power supply path to protect the digital control circuits. In order to reduce current commutation loop inductance within the GaN phase leg, an improved power loop design with vertical structure is proposed for lateral structure GaN transistors which can significantly reduce power loop inductance compared with conventional lateral power loop design. The design is verified through experiments on a phase leg prototype which prove the performance of the proposed phase leg on the overvoltage reduction during current transition along with less cross-coupling between power loop and gate loop compared with conventional lateral power loop design. A full bridge voltage source inverter is implemented with the designed phase leg and tested with EMI noise measurement that verifies the effectiveness of the CM propagation path control.