Integrated optical buffer using InP 1×8 switch and silica-based delay line circuit
暂无分享,去创建一个
S. Mino | T. Tanemura | Y. Hashizume | Y. Nakano | M.-J Kwack | T. Oyama | M. Zaitsu
[1] J.P. Mack,et al. Synchronously Loaded Optical Packet Buffer , 2008, IEEE Photonics Technology Letters.
[2] Rodney S Tucker,et al. Multiple-input single-output FIFO optical buffers with controllable fractional delay lines. , 2008, Optics express.
[3] J. Gripp,et al. Demonstration of an integrated buffer for an all-optical packet router , 2009, 2009 Conference on Optical Fiber Communication - incudes post deadline papers.
[4] Takuo Tanemura,et al. Wavelength-multiplexed optical packet switching using InP phased-array switch. , 2009, Optics express.
[5] T. Goh,et al. Silica-based waveguide-type 16 x 16 optical switch module incorporating driving circuits , 2003, IEEE Photonics Technology Letters.
[6] Takuo Tanemura,et al. 160-Gb/s Optical Packet Switching Subsystem With a Monolithic Optical Phased-Array Switch , 2010, IEEE Photonics Technology Letters.
[7] Takuo Tanemura,et al. Large-Capacity Compact Optical Buffer Based on InP Integrated Phased-Array Switch and Coiled Fiber Delay Lines , 2011, Journal of Lightwave Technology.
[8] John E. Bowers,et al. A comparison of optical buffering technologies , 2008, Opt. Switch. Netw..
[9] M. Smit,et al. Monolithically Integrated InP 1 $\times$ 16 Optical Switch With Wavelength-Insensitive Operation , 2010, IEEE Photonics Technology Letters.
[10] P. Cochat,et al. Et al , 2008, Archives de pediatrie : organe officiel de la Societe francaise de pediatrie.