论文信息 - Analysis and design for reducing voltage stress in output rectifier of LFLRV SIV DC-DC converter

Analysis and design for reducing voltage stress in output rectifier of LFLRV SIV DC-DC converter

This paper presents a full-bridge full-wave DC-DC converter used in 35kVA power grade auxiliary static inverter (SIV) of first low-floor light rail vehicle (LFLRV) in China, where reducing voltage stress in output rectifier diodes is so important for the converter reliability. DC-bias function of high frequency transformer is analyzed and a sensorless digital dc-bias control method by DSP and CPLD without capacitor is given. Voltage spike caused by the secondary winding resonance is analyzed and three output RCD snubber circuit modes are given and compared, the dissipation of each snubber mode is deeply described. Lastly, engineering design methods are additionally given to reduce voltage stress.

Jie Chen | Zhigang Liu | Lijun Diao | Wenli Lin

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