Computational analysis on the effects of double-layer build-up printed circuit board on the wafer level chip scale package (WLCSP) assembly with Pb-free solder joints

In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on a double-layer microvia build-up printed circuit board (PCB) assembly subjected to thermal cycling conditions are presented. The lead-free solder considered is 96.5Sn-3.5Ag which is assumed to obey the Garofalo-Arrhenius creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, shear creep strain history, and creep strain density range at the comer solder joint are presented for a better understanding of the thermal-mechanical behavior of the lead-free solder bumped WLCSP on the double-layer microvia build-up PCB assembly.

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