A high-speed buck converter for efficiency enhancement of W-CDMA power amplifiers

We present a design strategy for a buck converter, which fulfills the high dynamic requirements of efficient envelope amplifier needed by modern efficiency enhancement techniques for power amplifiers . The proposed DC–DC converter has an innovative control system, which makes it fast, robust, and resource saving. A mathematical model describes its dynamic behavior and is used to find a setup, which gives an optimal compromise between the dynamic performance and efficiency. The approach is applicable to various state-of-the-art communication standards. As an example, an envelope following (EF) power amplifier (PA) for the wideband code-division-multiple-access (W-CDMA) modulation scheme is treated. The corresponding buck converter is implemented in a monolithic chip (except the inductor and the capacitor of the output filter). The measurements with an industry standard W-CDMA PA (RMPA2265) match very well with the forecast of the model and confirm doubling of the average efficiency.

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