论文信息 - Testing flash memories

Testing flash memories

Flash memories can undergo three different types of disturbances, DC-programming, DC-erasure, and drain disturbance. These faults are specific to flash memories and do not occur in RAMs. In this paper, we discuss these disturbances, their causes, and develop fault models that capture the characteristics of these faults. We present optimal and near optimal algorithms to detect these faults in flash memories.

[1] Koji Hashimoto,et al. A 120-mm/sup 2/ 64-Mb NAND flash memory achieving 180 ns/Byte effective program speed , 1997 .

[2] M. Lanzoni,et al. Nonvolatile multilevel memories for digital applications , 1998, Proc. IEEE.

[3] Brian L. Dipert,et al. Designing with flash memory , 1993 .

[4] Piero Olivo,et al. Flash memory cells-an overview , 1997, Proc. IEEE.

[5] Marian Marinescu,et al. Simple and Efficient Algorithms for Functional RAM Testing , 1982, ITC.

[6] Kewal K. Saluja,et al. A built-in self-test algorithm for row/column pattern sensitive faults in RAMs , 1990 .

[7] Pinaki Mazumder,et al. Testing and Testable Design of High-Density Random-Access Memories , 1996 .

[8] A. J. van de Goor,et al. Testing Semiconductor Memories: Theory and Practice , 1998 .