Notes on Multiple Input Signature Analysis
暂无分享,去创建一个
[1] Howard C. Card,et al. Cellular automata-based pseudorandom number generators for built-in self-test , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[2] W. Daehn,et al. Aliasing errors in multiple input signature analysis registers , 1989, [1989] Proceedings of the 1st European Test Conference.
[3] René David. Comments on "Signature Analysis for Multiple Output Circuits" , 1990, IEEE Trans. Computers.
[4] T. Williams,et al. Aliasing errors in linear automata used as multiple-input signature analyzers , 1990 .
[5] Edward J. McCluskey,et al. Hybrid designs generating maximum-length sequences , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[6] W. Nef. Linear Algebra , 1967 .
[7] A. Hlawiczka. Hybrid design of parallel signature analyzers , 1989, [1989] Proceedings of the 1st European Test Conference.
[8] Theo J. Powell,et al. Analysis and Simulation of Parallel Signature Analyzers , 1987, ITC.
[9] Dhiraj K. Pradhan,et al. Aliasing Probability for Multiple Input Signature Analyzer , 1990, IEEE Trans. Computers.
[10] Piero Olivo,et al. Analysis and Design of Linear Finite State Machines for Signature Analysis Testing , 1991, IEEE Trans. Computers.
[11] Nirmal R. Saxena,et al. Simultaneous signature and syndrome compression , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[12] William Feller,et al. An Introduction to Probability Theory and Its Applications , 1951 .
[13] Edward J. McCluskey,et al. Logic design principles - with emphasis on testable semicustom circuits , 1986, Prentice Hall series in computer engineering.
[14] K. Iwasaki,et al. An analysis of the aliasing probability of multiple-input signature registers in the case of a 2m-ary symmetric channel , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[15] Michele Favalli,et al. Aliasing in signature analysis testing with multiple input shift registers , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[16] C. C. MacDuffee,et al. Vectors and matrices , 1943 .
[17] W. W. Peterson,et al. Error-Correcting Codes. , 1962 .
[18] Wilfried Daehn,et al. Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials , 1986, ITC.
[19] T. W. Williams,et al. Aliasing probability for multiple input signature analyzers with dependent inputs , 1989, Proceedings. VLSI and Computer Peripherals. COMPEURO 89.
[20] Jacob Savir,et al. Built In Test for VLSI: Pseudorandom Techniques , 1987 .
[21] Hideo Fujiwara,et al. Logic Testing and Design for Testability , 1985 .