RF waveform method for the determination of the safe operating area of GaN HFET's for amplifiers subjected to high output VSWR

Solid state power amplifiers are ordinarily fitted with an isolator at the output port to protect the transistors from large variations in the load impedance. Using GaN transistor technology should allow safe transistor operation to higher field levels and also to higher channel temperatures, which may remove the necessity for the isolator component — reducing circuit losses, and reducing circuit cost and weight. The resulting required transistor mismatch withstand capability is conventionally verified by selecting a specified fundamental frequency VSWR level and sweeping the load phase. The resulting load-line trajectories, mapping the RF voltage and current excursions, are not normally accessible. In the technique described in this paper the RF IV waveforms are directly observed for a variety of load-line characteristics appropriate for mismatch conditions. Load-lines for conventional VSWR's of 10:1 are compared to worst case loads corresponding to total reflection at the fundamental. The role of harmonic terminating impedance is also discussed — and it is demonstrated that the manipulation of the 2nd and 3rd harmonic impedances can 'shape' the load-lines. Measurements are performed on 2×50µm GaN HFET transistors.