Derivation of delay insensitive and speed independent CMOS circuits, using directed commands and production rule sets

1 1 Design Theory I 1.1 Delay Insensitivity and Speed Independence 2 1.2 Decompositions and DI -decompositions 3 Directed Trace Structures and Directed Commands 3 Specifications and States 4 Conditional Transitions 5 A Heuristic for finding Decompositions 6 1.3 Production Rule Sets to derive (C) MOS Implementations 7 Boolean Terms and Literal Terms 7 Production Rules 8 Translation of P.R. Sets into (C) MOS Circuits IO Calculating with P.R. Sets II 1.4 Costs Measures for (C) MOS Implementations 16 Size Measure 16 Delay Measure 18 Examples 19 2 The Demultiplexer 2.

[1]  Jos C. M. Baeten,et al.  A Congruence Theorem for Structured Operational Semantics with Predicates , 1993, CONCUR.

[2]  Jan A. Bergstra,et al.  Axiomatizing Probabilistic Processes: ACP with Generative Probabilities , 1995, Inf. Comput..

[3]  van Km Kees Hee,et al.  Systems engineering : a formal approach. Part I. System concepts , 1993 .

[4]  J. Hooman,et al.  A compositional proof system for real-time systems based on explicit clock temporal logic , 1991, Proceedings of the Sixth International Workshop on Software Specification and Design.

[5]  Alain J. Martin.  The limitations to delay-insensitivity in asynchronous circuits , 1990 .

[6]  Joost-Pieter Katoen,et al.  Parallel programs for the recognition of P-invariant segments , 1991 .

[7]  Fairouz Kamareddine,et al.  A unified approach to type theory through a refined lambda-calculus , 1992 .

[8]  P Pieter Struik.  Techniques for designing efficient parallel programs , 1991 .

[9]  Dick Alstein,et al.  Dynamic reconfiguration in distributed hard real-time systems , 1991 .

[10]  Kees van Berkel.  Beware the isochronic fork , 1992, Integr..

[11]  Amar Mukherjee,et al.  Introduction to Nmos and Cmos Vlsi Systems Design , 1986 .

[12]  Erik Poll,et al.  Some categorical properties for a model for second order lambda calculus with subtyping , 1991 .

[13]  Gerard Zwaan,et al.  A taxonomy of keyword pattern matching algorithms , 1992 .

[14]  J. C. Ebergen.  Translating programs into delay-insensitive circuits , 1989 .

[15]  Randal E. Bryant,et al.  A Switch-Level Model and Simulator for MOS Digital Systems , 1984, IEEE Transactions on Computers.

[16]  P. D. Moerland,et al.  Exercises in multiprogramming , 1993 .

[17]  Robert K. Brayton,et al.  Logic Minimization Algorithms for VLSI Synthesis , 1984, The Kluwer International Series in Engineering and Computer Science.

[18]  C.H. van Berkel,et al.  Compilations of communicating processes into delay-insensitive circuits , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[19]  Trevor York,et al.  Book Review: Principles of CMOS VLSI Design: A Systems Perspective , 1986 .