Pattern classification by memristive crossbar circuits using ex situ and in situ training

[1]  Jong-Ho Lee,et al.  32 × 32 Crossbar Array Resistive Memory Composed of a Stacked Schottky Diode and Unipolar Resistive Memory , 2013 .

[2]  Fabien Alibart,et al.  Pavlov's Dog Associative Learning Demonstrated on Synaptic-Like Organic Transistors , 2013, Neural Computation.

[3]  Yukio Hayakawa,et al.  An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput , 2012, IEEE Journal of Solid-State Circuits.

[4]  M. Ziegler,et al.  An Electronic Version of Pavlov's Dog , 2012 .

[5]  Byoungil Lee,et al.  Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing. , 2012, Nano letters.

[6]  Shimeng Yu,et al.  Metal–Oxide RRAM , 2012, Proceedings of the IEEE.

[7]  Max Welling,et al.  Machine Learning on Very Large Data Sets: Distributed Gibbs Sampling for Latent Variable Models , 2012 .

[8]  Johannes Schemmel,et al.  Is a 4-Bit Synaptic Weight Resolution Enough? – Constraints on Enabling Spike-Timing Dependent Plasticity in Neuromorphic Hardware , 2012, Front. Neurosci..

[9]  Hang Zhang,et al.  Ubiquitous Log Odds: A Common Representation of Probability and Frequency Distortion in Perception, Action, and Cognition , 2012, Front. Neurosci..

[10]  Narayan Srinivasa,et al.  A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. , 2012, Nano letters.

[11]  R. Williams,et al.  Measuring the switching dynamics and energy efficiency of tantalum oxide memristors , 2011, Nanotechnology.

[12]  R. Williams,et al.  Sub-nanosecond switching of a tantalum oxide memristor , 2011, Nanotechnology.

[13]  O. Richard,et al.  10×10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation , 2011, 2011 International Electron Devices Meeting.

[14]  H.-S. Philip Wong,et al.  Energy efficient programming of nanoelectronic synaptic devices for large-scale implementation of associative and temporal sequence learning , 2011, 2011 International Electron Devices Meeting.

[15]  Ligang Gao,et al.  High precision tuning of state for memristive devices by adaptable variation-tolerant algorithm , 2011, Nanotechnology.

[16]  S. Ha,et al.  Adaptive oxide electronics: A review , 2011 .

[17]  Damien Querlioz,et al.  Simulation of a memristor-based spiking neural network immune to device variations , 2011, The 2011 International Joint Conference on Neural Networks.

[18]  Herbert Schroeder,et al.  Comment on “Exponential ionic drift: fast switching and low volatility of thin-film memristors” by D.B. Strukov and R.S. Williams in Appl. Phys. A (2009) 94: 515–519 , 2011 .

[19]  Dmitri B. Strukov,et al.  Nanotechnology: Smart connections , 2011, Nature.

[20]  T. Hasegawa,et al.  Short-term plasticity and long-term potentiation mimicked in single inorganic synapses. , 2011, Nature materials.

[21]  Kinam Kim,et al.  A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures. , 2011, Nature materials.

[22]  H. Hwang,et al.  Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device , 2011, Nanotechnology.

[23]  M. Kozicki,et al.  Electrochemical metallization memories—fundamentals, applications, prospects , 2011, Nanotechnology.

[24]  Konstantin K. Likharev,et al.  CrossNets: Neuromorphic Hybrid CMOS/Nanoelectronic Networks , 2011 .

[25]  Gert Cauwenberghs,et al.  Neuromorphic Silicon Neuron Circuits , 2011, Front. Neurosci.

[26]  Dan W. Hammerstrom,et al.  Performance/price estimates for cortex-scale hardware: A design space exploration , 2011, Neural Networks.

[27]  Bernabé Linares-Barranco,et al.  On Spike-Timing-Dependent-Plasticity, Memristive Devices, and Building a Self-Learning Visual Cortex , 2011, Front. Neurosci..

[28]  Yuriy V. Pershin,et al.  Memory effects in complex materials and nanoscale systems , 2010, 1011.3053.

[29]  John Paul Strachan,et al.  Diffusion of Adhesion Layer Metals Controls Nanoscale Memristive Switching , 2010, Advanced materials.

[30]  Wei Yang Lu,et al.  Nanoscale memristor device as synapse in neuromorphic systems. , 2010, Nano letters.

[31]  Dmitri B Strukov,et al.  Four-dimensional address topology for circuits with stacked multilayer crossbar arrays , 2009, Proceedings of the National Academy of Sciences.

[32]  J. Yang,et al.  Switching dynamics in titanium dioxide memristive devices , 2009 .

[33]  H. Hwang,et al.  An electrically modifiable synapse array of resistive switching memory , 2009, Nanotechnology.

[34]  Massimiliano Di Ventra,et al.  Experimental demonstration of associative memory with memristive neural networks , 2009, Neural Networks.

[35]  R. Williams,et al.  Exponential ionic drift: fast switching and low volatility of thin-film memristors , 2009 .

[36]  Konstantin K. Likharev,et al.  Hybrid CMOS/Nanoelectronic Circuits: Opportunities and Challenges , 2008 .

[37]  C.J. Kim,et al.  Stack friendly all-oxide 3D RRAM using GaInZnO peripheral TFT realized over glass substrates , 2008, 2008 IEEE International Electron Devices Meeting.

[38]  Ute Drechsler,et al.  Transition-metal-oxide-based resistance-change memories , 2008, IBM J. Res. Dev..

[39]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[40]  D. Ielmini,et al.  Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM , 2007, 2007 IEEE International Electron Devices Meeting.

[41]  R. Waser,et al.  Nanoionics-based resistive switching memories. , 2007, Nature materials.

[42]  K.K. Likharev,et al.  Reconfigurable Hybrid CMOS/Nanodevice Circuits for Image Processing , 2007, IEEE Transactions on Nanotechnology.

[43]  G. Snider,et al.  Self-organized computation with unreliable, memristive nanodevices , 2007 .

[44]  Bonnie A. Sheriff,et al.  A 160-kilobit molecular electronic memory patterned at 1011 bits per square centimetre , 2007, Nature.

[45]  Andreas Mayr,et al.  CrossNets: High‐Performance Neuromorphic Architectures for CMOL Circuits , 2003, Annals of the New York Academy of Sciences.

[46]  Carver A. Mead,et al.  A single-transistor silicon synapse , 1996 .

[47]  Anders Krogh,et al.  Introduction to the theory of neural computation , 1994, The advanced book program.

[48]  Alan F. Murray,et al.  Use of a-Si:H memory devices for non-volatile weight storage in artificial neural networks , 1993 .

[49]  Taher Daud,et al.  Solid‐state thin‐film memistor for electronic neural networks , 1990 .

[50]  J Joshua Yang,et al.  Memristive devices for computing. , 2013, Nature nanotechnology.

[51]  Uri C. Weiser,et al.  TEAM: ThrEshold Adaptive Memristor Model , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[52]  Shoji Sakamoto,et al.  An 8Mb multi-layered cross-point ReRAM macro with 443MB/s write throughput , 2012, 2012 IEEE International Solid-State Circuits Conference.

[53]  A. Brenner,et al.  INTRODUCTION TO THEORY , 1963 .