Reducing the oxygen dose for implanted (i.e. SIMOX) SOI material, and improving the implantation equipment and process balance, have been pursued in order to meet the requirements of the SIA ITRS (1999), increase yields and reliability of CMOS-SOI circuits, and reduce SOI wafer costs. A manufacturable "medium-dose" SIMOX process optimized for 0.18-0.13 /spl mu/m CMOS SOI technologies has been developed, yielding BOX and silicon layer thicknesses of /spl sim/150 nm and <190 nm respectively. Primary attributes of the material include low particle levels, reduced BOX and silicon defect densities, increased BOX breakdown fields, and reduced surface and interface roughness. These attributes result in improved defect detection capabilities using optical metrology tools, as well as improved BOX and gate oxide integrity.