Digital Filter for Cochlear Implant Implemented on a Field- Programmable Gate Array
暂无分享,去创建一个
The advent of multi-million gate Field Programmable Gate Arrays (FPGAs) with hardware support for multiplication opens an opportunity to recreate a significant portion of the front end of a human cochlea using this technology. In this paper we describe the implementation of the cochlear filter and show that it is entirely suited to a single device XC3S500 FPGA implementation .The filter gave a good fit to real time data with efficiency of hardware usage. Keywords—Cochlea, FPGA, IIR (Infinite Impulse Response), Multiplier.
[1] S.-G. Ahn,et al. Cochlear modeling using a general purpose digital signal processor , 1990, IEEE Conference on Aerospace and Electronics.
[2] Allyn E. Hubbard,et al. A cochlear filter implemented with a field-programmable gate array , 2002 .
[3] A. Hubbard,et al. A traveling-wave amplifier model of the cochlea. , 1993, Science.
[4] James M. Kates,et al. A time-domain digital cochlear model , 1991, IEEE Trans. Signal Process..