Offline program re-mapping to improve branch prediction efficiency in embedded systems

This work presents a technique for improving the efficiency of hardware branch predictors. The key approach is to apply techniques of off-line re-mapping of the program-space in order to reduce the incidence of conflict misses in the branch hardware. This work also presents a new model for organizing temporal information between blocks in the address space, which can be applied effectively to previous re-mapping systems as well. The increased efficiency can be translated to improved performance for fixed hardware specifications, or used to reduce the hardware cost for achieving targeted performance during the design cycle.

[1]  M. F.,et al.  Bibliography , 1985, Experimental Gerontology.

[2]  Karl Pettis,et al.  Profile guided code positioning , 1990, PLDI '90.

[3]  Miodrag Potkonjak,et al.  Synthesis of power efficient systems-on-silicon , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[4]  Scott A. Mahlke,et al.  Effective compiler support for predicated execution using the hyperblock , 1992, MICRO 25.

[5]  Miodrag Potkonjak,et al.  Efficient coloring of a large spectrum of graphs , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[6]  Scott A. Mahlke,et al.  IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors , 1998, 25 Years ISCA: Retrospectives and Reprints.

[7]  Brad Calder,et al.  Efficient procedure mapping using cache line coloring , 1997, PLDI '97.

[8]  Yale N. Patt,et al.  A two-level approach to making class predictions , 2003, 36th Annual Hawaii International Conference on System Sciences, 2003. Proceedings of the.

[9]  S. McFarling.  Combining Branch Predictors , 1993 .

[10]  K. So,et al.  Correlation-based branch prediction , 1992, [1992] Conference Record of the Twenty-Sixth Asilomar Conference on Signals, Systems & Computers.

[11]  Alan Jay Smith,et al.  Branch Prediction Strategies and Branch Target Buffer Design , 1995, Computer.

[12]  James E. Smith,et al.  A study of branch prediction strategies , 1981, ISCA '98.

[13]  Yale N. Patt,et al.  The effect of speculatively updating branch history on branch prediction accuracy, revisited , 1994, MICRO 27.

[14]  Miodrag Potkonjak,et al.  MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.

[15]  Gary S. Tyson,et al.  The effects of predicated execution on branch prediction , 1994, Proceedings of MICRO-27. The 27th Annual IEEE/ACM International Symposium on Microarchitecture.

[16]  Michael D. Smith,et al.  Procedure placement using temporal-ordering information , 1999, TOPL.