Improving Coverage and Reliability in Approximate Computing Using Application-Specific , Light-Weight Checks

Prior art in approximate computing has extensively studied computational resilience to errors. However, existing approaches often rely on static techniques, which potentially compromise coverage and reliability. Our approach, on the other hand, decouples error analysis of the approximate accelerator from quality analysis of the overall application. We use high-level, application-specific metrics, or Light-Weight Checks (LWCs), to gain coverage by exploiting imprecision tolerance at the application level. Unlike metrics that compare approximate solutions to exact ones, LWCs can be leveraged dynamically for error analysis and recovery, providing guarantees on worst-case application-level error. In our platformagnostic approach, these light-weight metrics are integrated directly into the application, enabling compatibility with any approximate acceleration technique. Our results present a case study of dynamic error control for inverse kinematics. Using software-based neural acceleration with LWC support, we demonstrate improvements in coverage, reliability, and overall performance.

[1]  Naresh R. Shanbhag,et al.  Soft digital signal processing , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[2]  Kaushik Roy,et al.  Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Naresh R. Shanbhag,et al.  Energy-efficient Motion Estimation using Error-Tolerance , 2006, ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design.

[4]  Kartik Mohanram,et al.  Approximate logic circuits for low overhead, non-intrusive concurrent error detection , 2008, 2008 Design, Automation and Test in Europe.

[5]  Woongki Baek,et al.  Green: a framework for supporting energy-conscious programming using controlled approximation , 2010, PLDI '10.

[6]  Douglas L. Jones,et al.  Scalable stochastic processors , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[7]  A. Bovik,et al.  A universal image quality index , 2002, IEEE Signal Processing Letters.

[8]  Shih-Lien Lu.  Speeding Up Processing with Approximation Circuits , 2004, Computer.

[9]  John Lach,et al.  A methodology for energy-quality tradeoff using imprecise hardware , 2012, DAC Design Automation Conference 2012.

[10]  Henry Hoffmann,et al.  Dynamic knobs for responsive power-aware computing , 2011, ASPLOS XVI.

[11]  George Chryssolouris,et al.  Confidence interval prediction for neural network models , 1996, IEEE Trans. Neural Networks.

[12]  Martin C. Rinard,et al.  Verifying quantitative reliability for programs that execute on unreliable hardware , 2013, OOPSLA.

[13]  Luis Ceze,et al.  Architecture support for disciplined approximate programming , 2012, ASPLOS XVII.

[14]  Krishna V. Palem,et al.  Ultra-Efficient (Embedded) SOC Architectures based on Probabilistic CMOS (PCMOS) Technology , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[15]  Henry Hoffmann,et al.  Managing performance vs. accuracy trade-offs with loop perforation , 2011, ESEC/FSE '11.

[16]  Dan Grossman,et al.  EnerJ: approximate data types for safe and general low-power computation , 2011, PLDI '11.

[17]  Luis Ceze,et al.  Neural Acceleration for General-Purpose Approximate Programs , 2012, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture.

[18]  Robert Tibshirani,et al.  Bootstrap Methods for Standard Errors, Confidence Intervals, and Other Measures of Statistical Accuracy , 1986 .

[19]  Lionel Tarassenko,et al.  Estimations of error bounds for neural-network function approximators , 1999, IEEE Trans. Neural Networks.

[20]  T. Başar,et al.  A New Approach to Linear Filtering and Prediction Problems , 2001 .

[21]  Ku He,et al.  Controlled timing-error acceptance for low energy IDCT design , 2011, 2011 Design, Automation & Test in Europe.

[22]  Donald Yeung,et al.  Application-Level Correctness and its Impact on Fault Tolerance , 2007, 2007 IEEE 13th International Symposium on High Performance Computer Architecture.

[23]  Milos D. Ercegovac,et al.  The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration , 2007, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007).

[24]  Kaushik Roy,et al.  Low-Power Digital Signal Processing Using Approximate Adders , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[25]  Kaushik Roy,et al.  MACACO: Modeling and analysis of circuits for approximate computing , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[26]  Xin Li,et al.  An Architecture for Fault-Tolerant Computation with Stochastic Logic , 2011, IEEE Transactions on Computers.

[27]  Amin Ansari,et al.  Shoestring: probabilistic soft error reliability on the cheap , 2010, ASPLOS XV.

[28]  Jie Han,et al.  Approximate computing: An emerging paradigm for energy-efficient design , 2013, 2013 18th IEEE European Test Symposium (ETS).

[29]  Quinn Jacobson,et al.  ERSA: error resilient system architecture for probabilistic applications , 2010, DATE 2010.

[30]  Karthikeyan Sankaralingam,et al.  Relax: an architectural framework for software recovery of hardware faults , 2010, ISCA.

[31]  Anantha Chandrakasan,et al.  Approximate Signal Processing , 1997, J. VLSI Signal Process..

[32]  Kaushik Roy,et al.  SALSA: Systematic logic synthesis of approximate circuits , 2012, DAC Design Automation Conference 2012.

[33]  Christopher M. Bishop,et al.  Novelty detection and neural network validation , 1994 .

[34]  Stanley Osher,et al.  Image Denoising and Decomposition with Total Variation Minimization and Oscillatory Functions , 2004, Journal of Mathematical Imaging and Vision.

[35]  Chih-Cheng Chen,et al.  A combined optimization method for solving the inverse kinematics problems of mechanical manipulators , 1991, IEEE Trans. Robotics Autom..