Comparing Reyes and OpenGL on a stream architecture

The OpenGL and Reyes rendering pipelines each render complex scenes from similar scene descriptions but differ in their internal pipeline organizations. While the OpenGL organization has dominated hardware architectures over the past twenty years, a Reyes organization differs in several important ways from OpenGL, including a shader coordinate system that supports coherent texture accesses, a single shader in the vertex stage, and tessellation and sampling instead of triangle rasterization.Hardware for the OpenGL pipeline has been well-studied, but the lack of a hardware Reyes implementation has prevented a comparison between the two pipelines. We analyze and compare implementations of an OpenGL and a Reyes pipeline on the Imagine stream processor, a high performance programmable processor for media applications. This comparison both demonstrates the applicability of Reyes for hardware implementation and exposes many issues that architects will face in implementing Reyes in hardware, in particular the need for efficient subdivision algorithms and implementations.

[1]  Robert L. Cook,et al.  The Reyes image rendering architecture , 1987, SIGGRAPH.

[2]  Anoop Gupta,et al.  The Design and Analysis of a Cache Architecture for Texture Mapping , 1997, ISCA.

[3]  Homan Igehy,et al.  Prefetching in a texture cache architecture , 1998, Workshop on Graphics Hardware.

[4]  Lance Williams,et al.  Pyramidal parametrics , 1983, SIGGRAPH.

[5]  E. Catmull,et al.  Recursively generated B-spline surfaces on arbitrary topological meshes , 1978 .

[6]  Kari Pulli,et al.  Fast rendering of subdivision surfaces , 1996, SIGGRAPH Visual Proceedings.

[7]  G. Ward A RECURSIVE IMPLEMENTATION OF THE PERLIN NOISE FUNCTION , 1991 .

[8]  Mark Segal,et al.  The OpenGL Graphics System: A Specification , 2004 .

[9]  William J. Dally,et al.  Memory access scheduling , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).

[10]  William J. Dally,et al.  Polygon rendering on a stream architecture , 2000, Workshop on Graphics Hardware.

[11]  William J. Dally,et al.  Imagine: Media Processing with Streams , 2001, IEEE Micro.

[12]  Pat Hanrahan,et al.  A real-time procedural shading system for programmable graphics hardware , 2001, SIGGRAPH.

[13]  W. Dally,et al.  Stream Scheduling , 2001 .

[14]  Kari Pulli,et al.  Fast rendering of subdivision surfaces , 1996, SIGGRAPH '96.

[15]  Sven Havemann,et al.  Subdivision Surface Tesselation on the Fly using a versatile Mesh Data Structure , 2000, Comput. Graph. Forum.

[16]  Robert L. Cook,et al.  Stochastic sampling in computer graphics , 1988, TOGS.

[17]  Erik Lindholm,et al.  A user-programmable vertex engine , 2001, SIGGRAPH.

[18]  Hans-Peter Seidel,et al.  Towards hardware implementation of loop subdivision , 2000, Workshop on Graphics Hardware.

[19]  Homan Igehy,et al.  The design of a parallel graphics interface , 1998, SIGGRAPH.

[20]  Peter Schr,et al.  Subdivision for Modeling and Animation , 2000 .