Using your ADC and Backend Capacitors to Authenticate for Free: (Virtually) Free from Database, Enrollment, and Excessive Area/Power Overhead
暂无分享,去创建一个
[1] Kathleen Philips,et al. A 46 $\mu \text{W}$ 13 b 6.4 MS/s SAR ADC With Background Mismatch and Offset Calibration , 2017, IEEE Journal of Solid-State Circuits.
[2] Maurits Ortmanns,et al. Exploiting Weak PUFs From Data Converter Nonlinearity—E.g., A Multibit CT $\Delta\Sigma$ Modulator , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.
[3] Franco Maloberti,et al. Analog Design for CMOS VLSI Systems , 2001 .
[4] Daniel E. Holcomb,et al. Low-power sub-threshold design of secure physical unclonable functions , 2010, 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED).
[5] Swarup Bhunia,et al. Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances , 2018, ISLPED.
[6] Soon-Jyh Chang,et al. A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure , 2010, IEEE Journal of Solid-State Circuits.
[7] Mark Mohammad Tehranipoor,et al. Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain , 2014, Proceedings of the IEEE.
[8] Chip-Hong Chang,et al. A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[9] Máire O'Neill,et al. A machine learning attack resistant multi-PUF design on FPGA , 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).
[10] Yu Zheng,et al. SACCI: Scan-Based Characterization Through Clock Phase Sweep for Counterfeit Chip Detection , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[11] Khaled N. Salama,et al. Matching Properties of Femtofarad and Sub-Femtofarad MOM Capacitors , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.
[12] Xingyuan Tong,et al. Noise Modeling and Analysis of SAR ADCs , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.