A Training-Efficient Hybrid-Structured Deep Neural Network With Reconfigurable Memristive Synapses

The continued success in the development of neuromorphic computing has immensely pushed today’s artificial intelligence forward. Deep neural networks (DNNs), a brainlike machine learning architecture, rely on the intensive vector–matrix computation with extraordinary performance in data-extensive applications. Recently, the nonvolatile memory (NVM) crossbar array uniquely has unvailed its intrinsic vector–matrix computation with parallel computing capability in neural network designs. In this article, we design and fabricate a hybrid-structured DNN (hybrid-DNN), combining both depth-in-space (spatial) and depth-in-time (temporal) deep learning characteristics. Our hybrid-DNN employs memristive synapses working in a hierarchical information processing fashion and delay-based spiking neural network (SNN) modules as the readout layer. Our fabricated prototype in 130-nm CMOS technology along with experimental results demonstrates its high computing parallelism and energy efficiency with low hardware implementation cost, making the designed system a candidate for low-power embedded applications. From chaotic time-series forecasting benchmarks, our hybrid-DNN exhibits $1.16\times $ – $13.77\times $ reduction on the prediction error compared to the state-of-the-art DNN designs. Moreover, our hybrid-DNN records 99.03% and 99.63% testing accuracy on the handwritten digit classification and the spoken digit recognition tasks, respectively.

[1]  Garrison W. Cottrell,et al.  Deep-ESN: A Multiple Projection-encoding Hierarchical Reservoir Computing Framework , 2017, ArXiv.

[2]  Yoshua Bengio,et al.  On Using Very Large Target Vocabulary for Neural Machine Translation , 2014, ACL.

[3]  Philip Heng Wai Leong,et al.  FINN: A Framework for Fast, Scalable Binarized Neural Network Inference , 2016, FPGA.

[4]  Guigang Zhang,et al.  Deep Learning , 2016, Int. J. Semantic Comput..

[5]  T. Hasegawa,et al.  Learning Abilities Achieved by a Single Solid‐State Atomic Switch , 2010, Advanced materials.

[6]  Joel Emer,et al.  Eyeriss: an Energy-efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks Accessed Terms of Use , 2022 .

[7]  L. Glass,et al.  Oscillation and chaos in physiological control systems. , 1977, Science.

[8]  Benjamin Schrauwen,et al.  An experimental unification of reservoir computing methods , 2007, Neural Networks.

[9]  L. Chua Memristor-The missing circuit element , 1971 .

[10]  P. Whittle,et al.  Hypothesis-Testing in Time Series Analysis. , 1952 .

[11]  A Beuter,et al.  Feedback and delays in neurological diseases: a modeling study using dynamical systems. , 1993, Bulletin of mathematical biology.

[12]  D. Geer,et al.  Chip makers turn to multicore processors , 2005, Computer.

[13]  Carver A. Mead,et al.  Neuromorphic electronic systems , 1990, Proc. IEEE.

[14]  Soumith Chintala,et al.  Unsupervised Representation Learning with Deep Convolutional Generative Adversarial Networks , 2015, ICLR.

[15]  L. Appeltant,et al.  Information processing using a single dynamical node as complex system , 2011, Nature communications.

[16]  Warren Robinett,et al.  Memristor-CMOS hybrid integrated circuits for reconfigurable logic. , 2009, Nano letters.

[17]  Anne Beuter,et al.  Feedback and delays in neurological diseases: A modeling study using gynamical systems , 1993 .

[18]  Seong-Geon Park,et al.  Impact of Oxygen Vacancy Ordering on the Formation of a Conductive Filament in $\hbox{TiO}_{2}$ for Resistive Switching Memory , 2011, IEEE Electron Device Letters.

[19]  Frederick T. Chen,et al.  Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM , 2008, 2008 IEEE International Electron Devices Meeting.

[20]  Abbas Nowzari-Dalini,et al.  Bio-inspired digit recognition using reward-modulated spike-timing-dependent plasticity in deep convolutional networks , 2019, Pattern Recognit..

[21]  Jianli Chen,et al.  Lighted-weighted model predictive control for hybrid ventilation operation based on clusters of neural network models , 2018 .

[22]  Dharmendra S. Modha,et al.  Backpropagation for Energy-Efficient Neuromorphic Computing , 2015, NIPS.

[23]  Qing Wu,et al.  Hardware realization of BSB recall function using memristor crossbar arrays , 2012, DAC Design Automation Conference 2012.

[24]  Yang Yi,et al.  Deep-DFR: A Memristive Deep Delayed Feedback Reservoir Computing System with Hybrid Neural Network Topology , 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

[25]  Zhuo Wang,et al.  In-Memory Computation of a Machine-Learning Classifier in a Standard 6T SRAM Array , 2017, IEEE Journal of Solid-State Circuits.

[26]  M. Alexander Nugent,et al.  The Generalized Metastable Switch Memristor Model , 2016, ArXiv.

[27]  Henk A. Dijkstra,et al.  Using network theory and machine learning to predict El Niño , 2018, Earth System Dynamics.

[28]  Andrew Zisserman,et al.  Very Deep Convolutional Networks for Large-Scale Image Recognition , 2014, ICLR.

[29]  Hong Wang,et al.  Loihi: A Neuromorphic Manycore Processor with On-Chip Learning , 2018, IEEE Micro.

[30]  Marian Verhelst,et al.  An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[31]  Yang Yi,et al.  Enabling An New Era of Brain-inspired Computing: Energy-efficient Spiking Neural Network with Ring Topology , 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

[32]  Yang Yi,et al.  DFR , 2018, ACM Journal on Emerging Technologies in Computing Systems.

[33]  Tao Li,et al.  Deep belief echo-state network and its application to time series prediction , 2017, Knowl. Based Syst..

[34]  Lukás Burget,et al.  Strategies for training large scale neural network language models , 2011, 2011 IEEE Workshop on Automatic Speech Recognition & Understanding.

[35]  Catherine Graves,et al.  Dot-product engine for neuromorphic computing: Programming 1T1M crossbar to accelerate matrix-vector multiplication , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[36]  Gregory K. Chen,et al.  A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS , 2018, 2018 IEEE Symposium on VLSI Circuits.

[37]  Sujan Kumar Gonugondla,et al.  A 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[38]  Alireza Goudarzi,et al.  Reservoir Computing Approach to Robust Computation Using Unreliable Nanoscale Networks , 2014, UCNC.

[39]  Geoffrey E. Hinton,et al.  ImageNet classification with deep convolutional neural networks , 2012, Commun. ACM.

[40]  Ulrich Ramacher,et al.  On the Construction of Artificial Brains , 2010 .

[41]  Jason Weston,et al.  A unified architecture for natural language processing: deep neural networks with multitask learning , 2008, ICML '08.

[42]  Luis Pesquera,et al.  Reservoir Computing with an Ensemble of Time-Delay Reservoirs , 2017, Cognitive Computation.

[43]  G. Indiveri,et al.  Neuromorphic architectures for spiking deep neural networks , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

[44]  Giacomo Indiveri,et al.  A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapses , 2015, Front. Neurosci..

[45]  Yang Yi,et al.  Analog Spike-Timing-Dependent Resistive Crossbar Design for Brain Inspired Computing , 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[46]  K. Ikeda,et al.  High-dimensional chaotic behavior in systems with time-delayed feedback , 1987 .

[47]  Xin Fu,et al.  Interspike-Interval-Based Analog Spike-Time-Dependent Encoder for Neuromorphic Processors , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[48]  Jianxiong Xiao,et al.  DeepDriving: Learning Affordance for Direct Perception in Autonomous Driving , 2015, 2015 IEEE International Conference on Computer Vision (ICCV).

[49]  Herbert Jaeger,et al.  The''echo state''approach to analysing and training recurrent neural networks , 2001 .

[50]  Shimeng Yu,et al.  Metal–Oxide RRAM , 2012, Proceedings of the IEEE.

[51]  Tao Li,et al.  Recurrent neural system with minimum complexity: A deep learning perspective , 2018, Neurocomputing.

[52]  Zhiwei Li,et al.  Binary neural network with 16 Mb RRAM macro chip for classification and online training , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

[53]  Eduardo D. Sontag,et al.  Computational Aspects of Feedback in Neural Circuits , 2006, PLoS Comput. Biol..

[54]  Minoru Asada,et al.  Information processing in echo state networks at the edge of chaos , 2011, Theory in Biosciences.