论文信息 - Method of manufacturing an insulated gate transistor and architecture of the type on-insulator substrate, and corresponding transistor

Method of manufacturing an insulated gate transistor and architecture of the type on-insulator substrate, and corresponding transistor

source regions S, drain D and channel 30 are formed in a silicon layer 3 fully insulated vertically from a carrier substrate 1 by an insulating layer 21, and bounded laterally by a lateral isolation region the shallow trench STI type.

Stephane Monfray | Alexandre Villaret | Thomas Skotniki

[1] T. Skotnicki,et al. SON (silicon on nothing)-a new device architecture for the ULSI era , 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).