Hardware-software Scalable Architectures for Gaussian Elimination over GF(2) and Higher Galois Fields

Solving a System of Linear Equations over Finite Fields finds one of the most important practical applications, for instance, in problems arising in cryptanalysis and network coding among others. However, other than software-only approaches to acceleration, the amount of focus particularly towards hardware or hardware/software based solutions is small, in comparison to that towards general linear equation solvers. We present scalable architectures for Gaussian elimination with pivoting over GF(2) and higher fields, both as custom extensions to commodity processors or as dedicated hardware for larger problems. In particular, we present: 1) Designs of components—Matrix Multiplication and ‘Basis search and Inversion’—for Gaussian elimination over GF(2), prototyped as custom instruction extensions to Nios-II on DE2-70 (DE2, 2008), which even with a 50MHz clock perform at 30 GOPS (billion GF(2) operations); and also report results for GF(28) or higher order matrix multiplication with about 20 GOPS performance at 200MBps. 2) A scalable extension of a previous design (Bogdanov et. al, 2006) for multiple FPGAs and with 2.5 TrillionOPS performance at 5GBps bandwidth on a Virtex-5 FPGA.