Mapping of neural networks on honeycomb architectures: area analysis

VLSI area analysis of three neural network models-the Hopfield, Hamming, and perception neural network models-is discussed. An overview of the standard-cell/sea-of-gates VLSI technology is given. Three architectures for the neural network models are proposed using this technology, and each model is discussed with an emphasis on hardware implementation. The VLSI area analysis is presented.<<ETX>>