Self-blocking flip-flop design
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[1] V.G. Oklobdzija,et al. Improved sense-amplifier-based flip-flop: design and measurements , 2000, IEEE Journal of Solid-State Circuits.
[2] Samuel D. Naffziger,et al. The implementation of the Itanium 2 microprocessor , 2002, IEEE J. Solid State Circuits.
[3] Jan M. Rabaey,et al. Digital Integrated Circuits: A Design Perspective , 1995 .
[4] Lee-Sup Kim,et al. A 200 MHz 13 mm/sup 2/ 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme , 1994 .
[5] David Harris,et al. CMOS VLSI Design: A Circuits and Systems Perspective , 2004 .
[6] Christer Svensson,et al. New single-clock CMOS latches and flipflops with improved speed and power savings , 1997 .