Computer Aided Design Tools

In the previous chapters, approaches were presented to minimize the power consumption though supply voltage scaling and the reduction of switched capacitance. The focus of this chapter is on automatically finding computational structures that result in the lowest power consumption for DSP applications that have a specific throughput constraint given a high-level algorithmic specification. The basic approach is to scan the design space utilizing various algorithmic flowgraph transformations, high-level power estimation, and efficient heuristic/probabilistic search mechanisms. While algorithmic transformations have been successfully applied in high-level synthesis with the goal of optimizing speed and/or area, they have not addressed the problem of minimizing power.