Packet header analysis and field extraction for multigigabit networks
暂无分享,去创建一个
[1] Tomas Dedek,et al. High Level Abstraction Language as an Alternative to Embedded Processors for Internet Packet Processing in FPGA , 2007, 2007 International Conference on Field Programmable Logic and Applications.
[2] Patrick Crowley,et al. Network Processor Design: Issues and Practices , 2002 .
[3] Christopher R. Clark,et al. Scalable pattern matching for high speed networks , 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.
[4] Haoyu Song,et al. Efficient packet classification for network intrusion detection using FPGA , 2005, FPGA '05.
[5] Viktor K. Prasanna,et al. Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs , 2006, IEEE Trans. Dependable Secur. Comput..
[6] Rochit Rajsuman. System-On-A-Chip: Design and Test , 2000 .
[7] Jan Korenek,et al. Fast and scalable packet classification using perfect hash functions , 2009, FPGA '09.
[8] Philip H. W. Leong,et al. International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy , 2010, FPL.
[9] John W. Lockwood,et al. Protocol Wrappers for Layered Network Packet Processing in Reconfigurable Hardware , 2002, IEEE Micro.
[10] Jan Korenek,et al. Network Probe for Flexible Flow Monitoring , 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.