University of Delaware Department of Electrical and Computer Engineering Computer Architecture and Parallel Systems Laboratory Multidimensional Kernel Generation for Loop Nest Software Pipelining

Single-dimension Software Pipelining (SSP) has been proposed as an effective software pipelining technique for multidimensional loops [18]. However, the scheduling methods that actually produce the kernel code have not been published yet. Because of the multi-dimensional nature of SSP kernels, the scheduling problem is more complex and challenging than with modulo scheduling. The scheduler must handle multiple subkernels and initiation rates, scheduling constraints specific to SSP while producing a solution that minimizes the execution time of the final schedule. In this paper three approaches are proposed: the flat method, which schedules operations from different loop levels with the same priority, the level-by-level method, which schedules innermost operations first and does not let other operations interfere with the already scheduled levels, and the hybrid method, which uses the level-by-level mechanism for the innermost level and the flat solution for the other levels. We also break a scheduling constraint introduced in earlier publications and allow for a more compact kernel. The proposed approaches, combined with different sets of heuristics, have been implemented in the Open64/ORC compiler, compared on loop nests from the Livermore and NAS benchmarks.

[1]  Guang R. Gao,et al.  Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design , 2005, LCPC.

[2]  Richard A. Huff,et al.  Lifetime-sensitive modulo scheduling , 1993, PLDI '93.

[3]  Javier Zalamea,et al.  Register constrained modulo scheduling , 2004, IEEE Transactions on Parallel and Distributed Systems.

[4]  Hongbo Rong,et al.  Single-dimension software pipelining for multi-dimensional loops , 2004 .

[5]  Guang R. Gao,et al.  Software pipelining showdown: optimal vs. heuristic methods in a production compiler , 1996, PLDI '96.

[6]  Guang R. Gao,et al.  A Framework for Resource-Constrained Rate-Optimal Software Pipelining , 1996, IEEE Trans. Parallel Distributed Syst..

[7]  Josep Llosa,et al.  Swing module scheduling: a lifetime-sensitive approach , 1996, Proceedings of the 1996 Conference on Parallel Architectures and Compilation Technique.

[8]  Jian Wang,et al.  Pipelining-Dovetailing: A Transformation to Enhance Software Pipelining for Nested Loops , 1996, CC.

[9]  Guang R. Gao,et al.  Code generation for single-dimension software pipelining of multi-dimensional loops , 2004, International Symposium on Code Generation and Optimization, 2004. CGO 2004..

[10]  Monica S. Lam,et al.  RETROSPECTIVE : Software Pipelining : An Effective Scheduling Technique for VLIW Machines , 1998 .

[11]  B. Ramakrishna Rau,et al.  Iterative modulo scheduling: an algorithm for software pipelining loops , 1994, MICRO 27.

[12]  B. Ramakrishna Rau,et al.  Instruction-level parallel processing: History, overview, and perspective , 2005, The Journal of Supercomputing.

[13]  Kalyan Muthukumar,et al.  Software Pipelining of Nested Loops , 2001, CC.

[14]  Frédéric Vivien,et al.  Constructing and exploiting linear schedules with prescribed parallelism , 2002, TODE.

[15]  Guang R. Gao,et al.  Extending Software Pipelining Techniques for Scheduling Nested Loops , 1993, LCPC.

[16]  Guang R. Gao,et al.  Optimal Modulo Scheduling Through Enumeration , 2004, International Journal of Parallel Programming.

[17]  Vicki H. Allan,et al.  Software pipelining , 1995, CSUR.

[18]  Soo-Mook Moon,et al.  Parallelizing nonnumerical code with selective scheduling and software pipelining , 1997, TOPL.

[19]  Randolph E. Harr,et al.  Efficient pipelining of nested loops: unroll-and-squash , 2002, Proceedings 16th International Parallel and Distributed Processing Symposium.

[20]  Guang R. Gao,et al.  Register allocation for software pipelined multi-dimensional loops , 2005, PLDI '05.

[21]  Michael E. Wolf,et al.  Combining Loop Transformations Considering Caches and Scheduling , 2004, International Journal of Parallel Programming.

[22]  Philip H. Sweany,et al.  Improving software pipelining with unroll-and-jam , 1996, Proceedings of HICSS-29: 29th Hawaii International Conference on System Sciences.