Data Encoding Techniques for Reducing Energy Consumption in Network-on-Chip

In this paper, we present a set of data encoding schemes aimed at reducing the power dissipated by the links of a NoC. As technology shrinks, the power dissipated by the links of a network-on-chip (NoC) starts to compete with the power dissipated by the other elements of the communication subsystem namely the routers and the network interfaces (NIs). The proposed schemes are general and transparent with respect to the underlying NoC fabric (i.e., their application does not require any modification of the routers and link architecture). Experiments carried out on both synthetic and real traffic scenarios show the effectiveness of the proposed schemes, which allow saving up to 51% of power dissipation and 14% of energy consumption without any significant performance degradation and with less than 15% area overhead in the network interface. The EDA tool used in the paper is Software tools i.e. Modelsim 10.0c (Simulation), Xilinx ISE 14.4 (Synthesis) and languages used for outputs is Verilog-

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