A paradigm shift in patterning foundation from frequency multiplication to edge-placement accuracy: a novel processing solution by selective etching and alternating-material self-aligned multiple patterning

Overlay errors, cut/block and line/space critical-dimension (CD) variations are the major sources of the edge-placement errors (EPE) in the cut/block patterning processes of complementary lithography when IC technology is scaled down to sub-10nm half pitch (HP). In this paper, we propose and discuss a modular technology to reduce the EPE effect by combining selective etching and alternating-material (dual-material) self-aligned multiple patterning (altSAMP) processes. Preliminary results of altSAMP process development and material screening experiment are reported and possible material candidates are suggested. A geometrical cut-process yield model considering the joint effect of overlay errors, cut-hole and line CD variations is developed to analyze its patterning performance. In addition to the contributions from the above three process variations, the impacts of key control parameters (such as cut-hole overhang and etching selectivity) on the patterning yield are examined. It is shown that the optimized altSAMP patterning process significantly improves the patterning yield compared with conventional SAMP processes, especially when the half pitch of device patterns is driven down to 7 nm and below.

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