Design of a Hardware Router for Recursive Circulant Multicomputers

The performance of the communication network plays an important role in determining the overall performance of multicomputers. Hardware routers which interconnect processing elements can greatly improve the system performance by overlapping the computation and the communication. In this paper, we propose a hardware router for recursive circulant multicomputers. The proposed router supports a recursive circulant topology directly. The router is based on wormhole routing and a minimal, deterministic routing. We use two virtual channels per physical channel in order to prevent deadlocks which may be caused by the adopted routing algorithm. We partition the data path into smaller routing modules for the router to be scalable. Thus we can construct a high degree hardware router by cascading routing modules. Moreover, we can construct a hardware router of low hardware complexity and simplicity by this modular design. The proposed hardware router is implemented and veriied by using VHDL.