Cathedral II: A Synthesis and Module Generation System for Multiprocessor Systems on a Chip

[1]  Seung Ho Hwang,et al.  An accuration delay modeling technique for switch-level timing verification , 1986, DAC 1986.

[2]  G. Goossens,et al.  Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system , 1986 .

[3]  B. Muller,et al.  The Chipgenerator Concept - A New Approach To Full Custom CMOS IC Design , 1985, ESSCIRC '85: 11th European Solid-State Circuits Conference.

[4]  Hugo De Man,et al.  DIALOG: An Expert Debugging System for MOSVLSI Design , 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  Jan M. Rabaey,et al.  An Integrated Automated Layout Generation System for DSP Circuits , 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  Beth W. Tucker.  Electronic CAD/CAM - Is It Revolution or Evolution , 1985, 22nd ACM/IEEE Design Automation Conference.

[7]  J. Allen,et al.  Computer architecture for digital signal processing , 1985, Proceedings of the IEEE.

[8]  Peter Marwedel,et al.  The MIMOLA Design System: Tools for the Design of Digital Processors , 1984, 21st Design Automation Conference Proceedings.

[9]  Donald E. Thomas,et al.  Automatic Data Path Synthesis , 1983, Computer.

[10]  Norman P. Jouppi,et al.  Timing Analysis for nMOS VLSI , 1983, 20th Design Automation Conference Proceedings.

[11]  Kenneth Steiglitz,et al.  Combinatorial Optimization: Algorithms and Complexity , 1981 .

[12]  Robert J. Sluyter,et al.  A novel method for pitch extraction from speech and a hardware model applicable to vocoder systems , 1980, ICASSP.

[13]  Robert E. Tarjan,et al.  Depth-First Search and Linear Graph Algorithms , 1972, SIAM J. Comput..