A single-chip 2.4GHz double cascode power amplifier with switched programmable feedback biasing under multiple supply voltages in 65nm CMOS for WLAN application

A 2.4GHz fully integrated power amplifier with an on-chip balun for embedded WLAN applications with direct battery connection (2.3–5.5V) is presented. With a switched programmable feedback bias network, the PA can deliver 23.5dBm to 28.4dBm CW saturated power and 18.2dBm to 23.2dBm OFDM linear power (−25dB EVM) with PAPD when the supply varies from 2.3V to 5.5V. The PA occupies 1.2mm2 in 65nm CMOS.

[1]  D. Leenaerts,et al.  A 2.4 GHz 0.18 /spl mu/m CMOS self-biased cascode power amplifier with 23 dBm output power , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[2]  A. Scuderi,et al.  A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA/EDGE/OFDM With Adaptive Digital Predistortion and Efficient Power Control , 2009, IEEE Journal of Solid-State Circuits.

[3]  Lawrence E. Larson,et al.  Fully integrated dual-band power amplifiers with on-chip baluns in 65nm CMOS for an 802.11n MIMO WLAN SoC , 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

[4]  Ali M. Niknejad,et al.  A single-chip highly linear 2.4GHz 30dBm power amplifier in 90nm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[5]  A. K. Ezzeddine,et al.  The high voltage/high power FET (HiVP) , 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

[6]  Ali Hajimiri,et al.  A Fully-Integrated Quad-Band GSM/GPRS CMOS Power Amplifier , 2008, IEEE Journal of Solid-State Circuits.

[7]  P. Asbeck,et al.  A 20 dBm Linear RF Power Amplifier Using Stacked Silicon-on-Sapphire MOSFETs , 2006, IEEE Microwave and Wireless Components Letters.