Modeling and simulation of IC and package power/ground network

The modeling and simulation results about the IC and package power/ground network have been depicted. With the modeling for broadband frequency region, the effect of each part in power/ground network on IC and package was analyzed in frequency domain. Keywords-modeling; simulation; power/ground network; high frequency; IC and package

[1]  D. Scott Wills,et al.  On-chip decoupling capacitor optimization using architectural level prediction , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[2]  Wolfgang J. R. Hoefer,et al.  The Transmission-Line Matrix Method--Theory and Applications , 1985 .

[3]  Joungho Kim,et al.  Prediction and verification of power/ground plane edge radiation excited by through-hole signal via based on balanced TLM and via coupling model , 2003, Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710).

[4]  Madhavan Swaminathan,et al.  Modeling and simulation of core switching noise for ASICs , 2002 .

[5]  Joungho Kim,et al.  Power distribution networks for system-on-package: status and challenges , 2004, IEEE Transactions on Advanced Packaging.

[6]  Larry D. Smith,et al.  Power distribution system design methodology and capacitor selection for modern CMOS technology , 1999 .

[7]  Keunmyung Lee,et al.  Modeling and analysis of multichip module power supply planes , 1995 .

[8]  Yici Cai,et al.  Optimal wire sizing in early-stage design of on-chip power/ground (P/G) networks , 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

[9]  T. Le Gouguec,et al.  3D frequency-dependent RLC elements extraction by full wave analysis: identification of the return current paths in complex power and ground grids of high speed VLSI circuits , 2005, Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005..

[10]  Jun So Pak,et al.  3GHz through-hole signal via model considering power/ground plane resonance coupling and via neck effect , 2003, 53rd Electronic Components and Technology Conference, 2003. Proceedings..

[11]  F. Guinjoan,et al.  Optimized design of MOS capacitors in standard CMOS technology and evaluation of their Equivalent Series Resistance for power applications , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[12]  R.R. Tummala,et al.  The SOP for miniaturized, mixed-signal computing, communication, and consumer systems of the next decade , 2004, IEEE Transactions on Advanced Packaging.

[13]  Joungho Kim,et al.  Co-Modeling and Co-Simulation of Package and On-Chip Decoupling Capacitor for Resonant Free Power/Ground Network Design , 2005, Proceedings Electronic Components and Technology, 2005. ECTC '05..