Design methodology of a configurable system-on-chip architecture

New reconfigurable computing platforms are introduced to overcome some of the limitations of microprocessors and fine-grained reconfigurable devices. One of the promising new architectures are special purpose programmable (SPP) or configurable system-on-chip (CSoC) solutions. This paper presents a new CSoC that offers a programming model and provides high flexibility and adaptability by employing microTask Controller (mTC). They were designed to provide high performance for real-time signal processing and for a broad range of applications exhibiting high degrees of parallelism.