Image processing using approximate datapath units
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[1] Mihaela van der Schaar,et al. Incremental Refinement of Computation for the Discrete Wavelet Transform , 2007, IEEE Transactions on Signal Processing.
[2] Rob A. Rutenbar,et al. Reducing power by optimizing the necessary precision/range of floating-point arithmetic , 2000, IEEE Trans. Very Large Scale Integr. Syst..
[3] Shih-Lien Lu. Speeding Up Processing with Approximation Circuits , 2004, Computer.
[4] Puneet Gupta,et al. Trading Accuracy for Power in a Multiplier Architecture , 2011, J. Low Power Electron..
[5] Rakesh Kumar,et al. On reconfiguration-oriented approximate adder design and its application , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[6] Naresh R. Shanbhag,et al. Reliable low-power digital signal processing via reduced precision redundancy , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[7] Kaushik Roy,et al. Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[8] Anantha Chandrakasan,et al. Energy scalable system design , 2002, IEEE Trans. Very Large Scale Integr. Syst..
[9] Paolo Ienne,et al. Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design , 2008, 2008 Design, Automation and Test in Europe.
[10] Chaitali Chakrabarti,et al. Energy and Quality-Aware Multimedia Signal Processing , 2013, IEEE Transactions on Multimedia.
[11] David H. Frakes,et al. Segment Adaptive Gradient Angle Interpolation , 2013, IEEE Transactions on Image Processing.
[12] John Sartori,et al. Architecting processors to allow voltage/reliability tradeoffs , 2011, 2011 Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES).
[13] Henk D. L. Hollmann,et al. Implementation of "Split-radix" FFT algorithms for complex, real, and real symmetric data , 1985, ICASSP '85. IEEE International Conference on Acoustics, Speech, and Signal Processing.
[14] Sandeep K. Gupta,et al. Approximate logic synthesis for error tolerant applications , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[15] John Sartori,et al. Statistical analysis and modeling for error composition in approximate computation circuits , 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).
[16] Marilyn Wolf,et al. System-Level Energy Optimization for Error-Tolerant Image Compression , 2010, IEEE Embedded Systems Letters.
[17] Kaushik Roy,et al. Low-Power Digital Signal Processing Using Approximate Adders , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[18] Kaushik Roy,et al. SALSA: Systematic logic synthesis of approximate circuits , 2012, DAC Design Automation Conference 2012.
[19] Chi-Ying Tsui,et al. Low-power VLSI design for motion estimation using adaptive pixel truncation , 2000, IEEE Trans. Circuits Syst. Video Technol..
[20] Anantha P. Chandrakasan,et al. Minimizing power consumption in digital CMOS circuits , 1995, Proc. IEEE.