Design space exploration of multiple loops on FPGAs using high level synthesis
暂无分享,去创建一个
Yun Liang | Vanchinathan Venkataramani | Tulika Mitra | Smaïl Niar | Guanwen Zhong | T. Mitra | Yun Liang | S. Niar | G. Zhong | Vanchinathan Venkataramani
[1] Jason Cong,et al. Platform-Based Behavior-Level and System-Level Synthesis , 2006, 2006 IEEE International SOC Conference.
[2] Jason Cong,et al. xPilot: A Platform-Based Behavioral Synthesis System , 2005 .
[3] Markus Rupp,et al. Design Space Exploration with Evolutionary Multi-Objective Optimisation , 2007, 2007 International Symposium on Industrial Embedded Systems.
[4] Tulika Mitra,et al. Evaluating design trade-offs in customizable processors , 2009, 2009 46th ACM/IEEE Design Automation Conference.
[5] Kazutoshi Wakabayashi,et al. Machine learning predictive modelling high-level synthesis design space exploration , 2012, IET Comput. Digit. Tech..
[6] Jason Cong,et al. Customizable Domain-Specific Computing , 2009, IEEE Design & Test of Computers.
[7] Smaïl Niar,et al. Radar signature in Multiple Target Tracking system for Driver Assistant application , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[8] Vittorio Zaccaria,et al. ReSPIR: A Response Surface-Based Pareto Iterative Refinement for Application-Specific Design Space Exploration , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[9] Ivo F. Sbalzariniy,et al. Multiobjective optimization using evolutionary algorithms , 2000 .
[10] Jason Cong,et al. Improving high level synthesis optimization opportunity through polyhedral transformations , 2013, FPGA '13.
[11] Nikil D. Dutt,et al. SPARK: a high-level synthesis framework for applying parallelizing compiler transformations , 2003, 16th International Conference on VLSI Design, 2003. Proceedings..
[12] Luca P. Carloni,et al. On learning-based methods for design-space exploration with High-Level Synthesis , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).
[13] Pedro C. Diniz,et al. A compiler approach to fast hardware design space exploration in FPGA-based systems , 2002, PLDI '02.
[14] Jason Cong,et al. Multilevel Granularity Parallelism Synthesis on FPGAs , 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.
[15] Vittorio Zaccaria,et al. A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customization , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[16] Jason Helge Anderson,et al. LegUp: high-level synthesis for FPGA-based processor/accelerator systems , 2011, FPGA '11.
[17] Kiamal Z. Pekmestzi,et al. A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning , 2010, ISVLSI.
[18] Jason Cong,et al. Combining module selection and replication for throughput-driven streaming programs , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[19] Jason Cong,et al. Throughput-oriented kernel porting onto FPGAs , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).
[20] Kazutoshi Wakabayashi,et al. Divide and conquer high-level synthesis design space exploration , 2012, TODE.
[21] Jean Luc Philippe,et al. Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.