A purely-VCO-based single-loop high-order continuous-time ΣΔ ADC
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[1] M.H. Perrott,et al. A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time $\Delta\Sigma$ ADC With VCO-Based Integrator and Quantizer Implemented in 0.13 $\mu$m CMOS , 2009, IEEE Journal of Solid-State Circuits.
[2] Luis Hernandez. VCO based multi-stage noise shaping ADC , 2012 .
[3] M.Z. Straayer,et al. A 12-Bit, 10-MHz Bandwidth, Continuous-Time $\Sigma\Delta$ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer , 2008, IEEE Journal of Solid-State Circuits.
[4] E. Sanchez-Sinencio,et al. A continuous-time sigma-delta modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth , 2004, IEEE Journal of Solid-State Circuits.
[5] Amr Elshazly,et al. A 71dB SFDR open loop VCO-based ADC using 2-level PWM modulation , 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.
[6] Jaewook Kim,et al. A Time-Domain High-Order MASH $\Delta\Sigma$ ADC Using Voltage-Controlled Gated-Ring Oscillator , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.
[7] Ian Galton,et al. A Mostly-Digital Variable-Rate Continuous-Time Delta-Sigma Modulator ADC , 2010, IEEE Journal of Solid-State Circuits.
[8] Michael H. Perrott,et al. A 12-Bit, 10-MHz Bandwidth, Continuous-Time ΣΔ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer , 2008, VLSIC 2008.
[9] Michael H. Perrott,et al. A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time � ADC With VCO-Based Integrator and Quantizer Implemented in 0 . 13 � m CMOS , 2009 .
[10] A 10MHz-BW, 5.6mW, 70dB SNDR ΔΣ ADC using VCO-based integrators with intrinsic DEM , 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).
[11] E. Sánchez-Sinencio,et al. A Continuous-Time Modulator With 88-dB Dynamic Range and 1 . 1-MHz Signal Bandwidth , 2001 .