A high abstraction, high accuracy power estimation model for networks-on-chip
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Leandro Soares Indrusiak | Fernando Gehm Moraes | Cezar Reinbrecht | Guilherme Montez Guindani | Thiago Raupp da Rosa | Luciano Ost
[1] Hiren D. Patel,et al. SystemC Kernel Extensions for Hetero-geneous System Modeling , 2004 .
[2] Fernando Gehm Moraes,et al. NoC Power Estimation at the RTL Abstraction Level , 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.
[3] Leandro Soares Indrusiak,et al. Inserting Data Encoding Techniques into NoC-Based Systems , 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).
[4] Edward A. Lee,et al. Actor-Oriented Design of Embedded Hardware and Software Systems , 2003, J. Circuits Syst. Comput..
[5] Leandro Soares Indrusiak,et al. Validation of executable application models mapped onto network-on-chip platforms , 2008, 2008 International Symposium on Industrial Embedded Systems.
[6] Sandeep K. Shukla,et al. SystemC Kernel extensions for heterogeneous system modeling - a framework for multi-MoC modeling and simulation , 2004 .
[7] Radu Marculescu,et al. Energy-aware mapping for tile-based NoC architectures under performance constraints , 2003, ASP-DAC '03.
[8] R. Ben Atitallah,et al. MPSoC power estimation framework at transaction level modeling , 2007, 2007 Internatonal Conference on Microelectronics.
[9] Mohammad Mirza-Aghatabar,et al. High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs , 2008, 21st International Conference on VLSI Design (VLSID 2008).
[10] Leandro Soares Indrusiak,et al. A simplified executable model to evaluate latency and throughput of networks-on-chip , 2008, SBCCI '08.
[11] Cristina Silvano,et al. Multi-Accuracy Power and Performance Transaction-Level Modeling , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[12] Andy D. Pimentel,et al. Calibration of Abstract Performance Models for System-Level Design Space Exploration , 2006, 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.
[13] Peng Yang,et al. PowerViP: SoC power estimation framework at transaction level , 2006, Asia and South Pacific Conference on Design Automation, 2006..
[14] Luca Benini,et al. Analysis of power consumption on switch fabrics in network routers , 2002, DAC '02.
[15] Li-Shiuan Peh,et al. High-level power analysis for multi-core chips , 2006, CASES '06.