High-Speed Memory Systems

A highspeed, intelligent, distributed control memory system is disclosed. The system, according to the preferred embodiment of the invention, is comprised or an array or modular, cascadable, integrated circuit devices, hereinafter referred to as «memory elements». Each memory element is further comprised of storage means, programmable on board processing («distributed control») means and means for interfacing with both the host system and the other memory elements in the array utilizing a single shared bus. Each memory element of the array is capable of transferring (reading or writing) data between adjacent memory elements once per clock cycle. In addition, each memory element is capable of broadcasting data to all memory elements of the array once per clock cycle. This ability to asynchronously transfer data between the memory elements at the clock rate, using the distributed control, facilitates unburdening host system hardware and software from tasks more efficiently performed by the distributed control. As a result, the momory itself can, for example, perform such tasks as sorting and searching, even across memory element boundaries, in a manner which conserves, is faster and more efficient then using, host system resources.

[1]  John S. Liptay,et al.  Structural Aspects of the System/360 Model 85 II: The Cache , 1968, IBM Syst. J..

[2]  Gordon Bell,et al.  An Investigation of Alternative Cache Organizations , 1974, IEEE Transactions on Computers.

[3]  D. Frohman-Bentchkowsky Non volatile semiconductor memories , 1981, 1981 International Electron Devices Meeting.

[4]  Richard W. Hamming,et al.  Error detecting and error correcting codes , 1950 .

[5]  Gordon E. Moore,et al.  Progress in digital integrated electronics , 1975 .

[6]  R. J. Beynon,et al.  Computers , 1985, Comput. Appl. Biosci..

[7]  P. W. Smith,et al.  Solid state: Bistable optical devices promise subpicosecond switching: Extensive research in materials and phenomena could lead to their ultimate use in optical communications, despite high power dissipation , 1981, IEEE Spectrum.

[8]  G. C. Feth,et al.  Memories are bigger, fasterߝand cheaper , 1973, IEEE spectrum.

[9]  Donald H. Gibson Considerations in block-oriented systems design , 1967, AFIPS '67 (Spring).

[10]  G. C. Feth Computers: Memories: Smaller, faster, and cheaper: A review of magnetic-bubble, electron-beam-accessed, disk- and tape-file memories; MOS RAMs and CCDs excel , 1976, IEEE Spectrum.

[11]  J. ContiC.,et al.  Structural aspects of the system/360 model 85 , 1968 .

[12]  R. Mattson Evaluation of multilevel memories , 1971 .

[13]  R.W. Keyes,et al.  Physical limits in digital electronics , 1975, Proceedings of the IEEE.

[14]  Peter W. H. Smith,et al.  Bistable optical devices promise subpicosecond switching , 1981 .

[15]  Martin E. Hellman I. `DES will be totally insecure within ten years¿ , 1979, IEEE Spectrum.

[16]  Richard E. Matick Computer storage systems and technology , 1977 .