The problem of on-line testing methods in approximate data processing

This paper is devoted to the on-line testing methods based on the self-checking techniques. These methods are aimed to estimate the reliability of a result calculated at the output of the circuit during operations. Definitions of the totally self-checking circuit have fixed assumptions that limit development of the computing circuits in on-line testing within the framework of the exact data processing. The main part of the processed numbers belongs to the approximate data. The errors produced by the faults of the computing circuits are inessential for the reliability of approximated result in most cases. The on-line testing methods demonstrate a new property for rejecting the reliable results in case of inessential errors detection. This fact makes a problem of low reliability of result checking. The ways to increase reliability of on-line testing methods are offered

[1]  J. V. Drozd,et al.  Efficient on-line testing method for a floating-point iterative array divider , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[2]  James Edward Smith The design of totally self-checking combinational circuits. , 1976 .

[3]  William Kahan,et al.  Lecture Notes on the Status of IEEE Standard 754 for Binary Floating-Point Arithmetic , 1996 .

[4]  Yervant Zorian,et al.  On-Line Testing for VLSI—A Compendium of Approaches , 1998, J. Electron. Test..

[5]  Michael Nicolaidis IP for embedded robustness , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[6]  A. Drozd Efficient method of failure detection in iterative array multiplier , 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

[7]  J. V. Drozd,et al.  The logarithmic checking method for on-line testing of computing circuits for processing of the approximated data , 2004, Euromicro Symposium on Digital System Design, 2004. DSD 2004..

[8]  A. Drozd ON-LINE TESTING OF COMPUTING CIRCUITS AT APPROXIMATE DATA PROCESSING , 2003 .

[9]  Cecilia Metra,et al.  Problems due to open faults in the interconnections of self-checking data paths , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[10]  Füsun Özgüner Design of Totally Self-Checking Asynchronous Sequential Machines , 1975 .

[11]  Michael Nicolaidis,et al.  Efficient implementations of self-checking multiply and divide arrays , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[12]  Michel Diaz,et al.  Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines , 1979, IEEE Transactions on Computers.

[13]  Cecilia Metra,et al.  Optimization of error detecting codes for the detection of crosstalk originated errors , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

[14]  Michael Nicolaidis,et al.  Efficient implementations of self-checking adders and ALUs , 1993, FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing.

[15]  Alexander V. Drozd,et al.  Efficient on-line testing method for a floating-point adder , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

[16]  Alexander V. Drozd,et al.  Hardware check of arithmetic devices with abridged execution of operations , 1996, Proceedings ED&TC European Design and Test Conference.

[17]  W. Kenneth Jenkins,et al.  The Design of Error Checkers for Self-Checking Residue Number Arithmetic , 1983, IEEE Transactions on Computers.

[18]  Gernot Metze,et al.  Design of Totally Self-Checking Check Circuits for m-Out-of-n Codes , 1973, IEEE Transactions on Computers.

[19]  Michael Nicolaidis,et al.  A CAD framework for generating self-checking multipliers based on residue codes , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).