Stacked zener trigger SCR for HV IC ESD protection

Abstract In HV BCD technology, SCR cannot been directly used as ESD protection owing to its high trigger voltage and low holding voltage. Stacked zener trigger SCRs for HV ESD protection is proposed and Compared to the traditional SCR. The proposed devices are fabricated with 0.35 um BCD process on P-type bulk wafers without buried layer. TLP testing results show that the single zener trigger SCR with 50 um width has a 6.7 V trigger voltage and 4.1 A failure current It2. Stacked 4 zener trigger SCRs is designed for 24 V I/O ESD protection, which has 8 V holding voltage, 27 V trigger voltage and pass7 KV HBM.